參數(shù)資料
型號： SII3124ACBHU
元件分類： 總線控制器
英文描述： PCI BUS CONTROLLER, PBGA364
封裝： 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364
文件頁數(shù)： 63/88頁
文件大?。?/td> 592K
代理商： SII3124ACBHU
PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
66
7.2.11 I
2C Data / Control
Address Offset: 7CH
Access Type: Read/Write
Reset Value: 0xXXXX_00XX
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
I
2 C
A
cce
ss
St
art
Addr
By
te
Cnt
I
2 C
Error
R
eser
ved
‘
1
’
Me
m
P
res
e
n
t
Read
Buf
fe
rFull
Wri
te
Buffe
rE
m
pty
Data Transfer Count
Reserved
I
2C Data
This register is the Data and Control register for the I
2C interface.
Bit [31]
: I
2C Access Start (R/W) – This bit is set to initiate an I2C operation. This bit is self-clearing when the
operation is complete.
Bit [30:29]
: Addr Byte Cnt (R/W) – Address Byte Count. The value written to this bit field specifies the number
of address bytes (0 to 3) to be transferred during an I
2C access. If this field is ‘00’ only the Control Byte is
transferred; if it is ‘01’ the Control Byte and bits 7:0 of the I
2C Address register are transferred; it it is ‘10’ the
Control Byte and bits 15:0 of the I
2C Address register are transferred; it it is ‘11’ the Control Byte and bits 23:0 of
the I
2C Address register are transferred. The value read from this bit field indicates the number of address bytes
that have been transferred. Once an I
2C access has completed, as indicated by bit 31, the read value and write
value of this field will be equal.
Bit [28]
: I
2C Error (R/W1C) – I2C Access Error. This bit set indicates that the I2C interface logic has detected
three NAKs on the I
2C interface. This typically occurs if no I2C device is present.
Bit [27]
: Reserved (R) This bit is reserved and returns ‘1’ on a read.
Bit [26]
: Mem Present (R) – Memory Present. This bit set indicates that the auto-initialization signature was
read correctly from the EEPROM connected to the I
2C interface.
Bit [25]
: Read Buffer Full (R). This bit indicates that read data from the I
2C controller is ready.
Bit [24]
: Write Buffer Empty (R). This bit indicates that the I
2C controller is ready to accept a byte for writing.
Bit [23:16]
: Data Transfer Count (R/W). The value written to this bit field specifies the number of data bytes (0
to 255) to be transferred during an I
2C access. The value read from this bit field indicates the number of data
bytes that have been transferred. Once an I
2C access has completed, as indicated by bit 31, the read value and
write value of this field will be equal.
Bit [15:08]
: Reserved (R). This bit field is reserved and returns zeros on a read.
Bit [07:00]
: I
2C Data (R/W) – This bit field is used for I2C write data on a write operation, and returns the I2C
read data on a read operation.
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