參數(shù)資料
型號: SII3124ACBHU
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA364
封裝: 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364
文件頁數(shù): 37/88頁
文件大?。?/td> 592K
代理商: SII3124ACBHU
PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
42
Unrecognized FIS. Indicates that the F-bit has been set in the Serror Diag field. Writing a one to bit 6 or 22 of
the port Interrupt Status Register clears this interrupt condition. This interrupt is enabled or disabled with the
corresponding bit in the port Interrupt Enable Set/Clear Register.
Device Exchanged. Indicates that the X-bit has been set in the Serror Diag field. The X-bit is set upon receipt of
a COMINIT from the device. Writing a one to bit 7 or 23 of the port Interrupt Status Register clears this interrupt
condition. This interrupt is enabled or disabled with the corresponding bit in the port Interrupt Enable Set/Clear
Register.
8b/10b Decode Error Threshold Exceeded. Indicates that the 8b/10b Decode Error counter has exceeded the
programmed non-zero threshold value. Writing any value to the port 8b/10b Decode Error Counter Register or
writing a one to bit 8 or 24 of the Interrupt Status Clear Register will clear this interrupt condition. This interrupt is
enabled by writing a non-zero value to the threshold field (bit[31:16]) of the port 8b/10b Decode Error Counter
Register. Writing a zero the threshold field will disable this interrupt.
CRC Error Threshold Exceeded. Indicates that the CRC Error counter has exceeded the programmed non-zero
threshold value. Writing any value to the port CRC Error Counter Register or writing a one to bit 9 or 25 of the
Interrupt Status Clear Register will clear this interrupt condition. This interrupt is enabled by writing a non-zero
value to the threshold field (bit[31:16]) of the port CRC Error Counter Register. Writing a zero to the threshold
field will disable this interrupt.
Handshake Error Threshold Exceeded. Indicates that the Handshake Error counter has exceeded the
programmed non-zero threshold value. A handshake error occurs when an R_ERR primitive is received. Writing
any value to the port Handshake Error Counter Register or writing a one to bit 10 or 26 of the Interrupt Status
Clear Register will clear this interrupt condition. This interrupt is enabled by writing a non-zero value to the
threshold field (bit[31:16]) of the port Handshake Error Counter Register. Writing a zero to the threshold field will
disable this interrupt.
SDB Notify. Indicates that a “Set Device Bits” FIS has been received with the N-bit set in the control field.
ATAPI and Port Multiplier devices optionally use this feature to signal the host that an event has occurred that
requires further scrutiny. Writing a one to bit 11 or 27 of the port Interrupt Status Register clears this interrupt
condition. This interrupt is enabled or disabled with the corresponding bit in the port Interrupt Enable Set/Clear
Register.
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