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參數(shù)資料
| 型號： | SII3124ACBHU |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA364 |
| 封裝： | 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364 |
| 文件頁數(shù)： | 26/88頁 |
| 文件大?。?/td> | 592K |
| 代理商： | SII3124ACBHU |
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PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
32
5.3.6
The PRB Protocol Override Field
The Protocol Override Field (offset 0x00, bits [31:16]) is used to specify a protocol behavior other than the default for this PRB.
PRBs for which the default protocol is to be used should set this field to 0x0000. The SiI3124 will decode the 8-bit ATA
command at PRB offset 0x0a and automatically execute the default protocol for the command. In certain cases it might be
desirable to specify a non-default protocol to be used, such as with vendor specific device commands. To override the
protocol, the host driver must set control_protocol_override (Control Field, bit 0) to one and place the desired protocol in this
field. Table 5-4 describes the Protocol Override bit positions.
Bit
Name
Description
16
protocol_packet
This command is to be executed as an ATAPI packet
command.
17
protocol_legacy_queue
This command is to be executed as an ATA legacy queued
command.
18
protocol_native_queue
This command is to be executed as a SATA native queued
command.
19
protocol_read
This command is expected to transfer data from device to
host.
20
protocol_write
This command is expected to transfer data from host to
device.
21
protocol_transparent
This command is to be executed with no protocol. After the
initial command FIS is successfully sent to the device,
completion status will be posted without waiting for
additional device transmissions.
31:22
Reserved
Must be zero.
Table 5-4 Protocol Override Bit Definitions
Note that there is no distinction between DMA and PIO data transfers in the protocol. The SiI3124 is a native serial ATA
device and relies on the SATA interface protocol to determine the data transfer type between the device and the SiI3124. All
data transfers between the SiI3124 and the Host are via DMA on the PCI(X) bus. From the host driver’s perspective, all
commands, whether PIO or DMA, transfer data through use of scatter/gather entries defined in the PRB and scatter/gather
tables.
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