參數(shù)資料
型號(hào)： SII3124ACBHU
元件分類(lèi)： 總線控制器
英文描述： PCI BUS CONTROLLER, PBGA364
封裝： 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364
文件頁(yè)數(shù)： 6/88頁(yè)
文件大?。?/td> 592K
代理商： SII3124ACBHU
PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
14
3 Pin Definition
3.1 SiI3124 Pin Listing
This section describes the pin-out of the SiI3124 PCI-X to Serial ATA host controller. The table below gives the pin numbers,
pin names, pin types, drive types where applicable, internal resistors where applicable, and descriptions. Power pins (VDDD,
VDDO, VDDRX, VDDTX, VDDPLLA, VDDPLLB, VSSPLLB, VSSA, and VSSD) are excluded from this listing.
Table 3-1 SiI3124 Pin Listing
Pin #
Pin Name
Type
Drive
Internal
Resistor
Description
C1
RX3+
Diff In
Serial port 3 differential receiver + input
C2
RX3-
Diff In
Serial port 3 differential receiver – input
D1
TX3-
Diff Out
Serial port 3 differential transmitter – output
D2
TX3+
Diff Out
Serial port 3 differential transmitter + output
F1
RX2+
Diff In
Serial port 2 differential receiver + input
F2
RX2-
Diff In
Serial port 2 differential receiver – input
G1
TX2-
Diff Out
Serial port 2 differential transmitter – output
G2
TX2+
Diff Out
Serial port 2 differential transmitter + output
J4
REXT
Analog
External Reference Resistor
J1
XTALI/CLKI
Analog
Crystal or Clock Input
J2
XTALO
Analog
Crystal Output
L1
RX1+
Diff In
Serial port 1 differential receiver + input
L2
RX1-
Diff In
Serial port 1 differential receiver – input
M1
TX1-
Diff Out
Serial port 1 differential transmitter – output
M2
TX1+
Diff Out
Serial port 1 differential transmitter + output
P1
RX0+
Diff In
Serial port 0 differential receiver + input
P2
RX0-
Diff In
Serial port 0 differential receiver – input
R1
TX0-
Diff Out
Serial port 0 differential transmitter – output
R2
TX0+
Diff Out
Serial port 0 differential transmitter + output
U1
P_CLK
PCI
PCI Clock
Y2
LED0
OD
12 mA
Channel 0 activity LED indicator
Y1
LED1
OD
12 mA
Channel 1 activity LED indicator
W2
LED2
OD
12 mA
Channel 2 activity LED indicator
W1
LED3
OD
12 mA
Channel 3 activity LED indicator
Y3
SCAN_MODE
I
PD-60K
Internal Scan Mode Control
W3
TRSTN
I-Schmitt
PU-70K
JTAG Test Reset
Y4
TCK
I-Schmitt
JTAG Test Clock
W4
TMS
I
PU-70K
JTAG Test Mode Select
V4
TDI
I
PU-70K
JTAG Test Data In
Y5
TDO
O
4 mA
JTAG Test Data Out
W5
P_INTB#
PCI
PCI Interrupt B
V5
P_INTA#
PCI
PCI Interrupt A
Y6
P_INTD#
PCI
PCI Interrupt D
W6
P_INTC#
PCI
PCI Interrupt C
U6
P_RST#
PCI
PCI Reset
U7
P_GNT#
PCI
PCI Bus Grant
Y7
P_REQ#
PCI
PCI Bus Request
Y8
P_AD31
PCI
PCI Address/Data bit 31
U8
P_AD30
PCI
PCI Address/Data bit 30
W8
P_AD29
PCI
PCI Address/Data bit 29
W9
P_AD28
PCI
PCI Address/Data bit 28
Y9
P_AD27
PCI
PCI Address/Data bit 27
U9
P_AD26
PCI
PCI Address/Data bit 26
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