參數(shù)資料
型號(hào): SII3124ACBHU
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA364
封裝: 21 X 21 MM, 1 MM PITCH, GREEN, BGA-364
文件頁(yè)數(shù): 46/88頁(yè)
文件大?。?/td> 592K
代理商: SII3124ACBHU
PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
50
7 Register Definitions
This section describes the registers within the SiI3124.
7.1 PCI Configuration Space
The PCI Configuration Space registers define the operation of the SiI3124 on the PCI bus. These registers are accessible
only when the SiI3124 detects a Configuration Read or Write operation, with its IDSEL asserted, on the PCI bus.
Address
Offset
Register Name
00H
Device ID
Vendor ID
04H
PCI Status
PCI Command
08H
PCI Class Code
Revision ID
0CH
BIST
Header Type
Latency Timer
Cache Line Size
10H
14H
Base Address Register 0
18H
1CH
Base Address Register 1
20H
Base Address Register 2
24H
Reserved
28H
Reserved
2CH
Subsystem ID
Subsystem Vendor ID
30H
Expansion ROM Base Address
34H
Reserved
Capabilities Ptr
38H
Reserved
3CH
Max Latency
Min Grant
Interrupt Pin
Interrupt Line
40H
PCI-X Command
Next Capability
PCI-X Cap ID
44H
PCI-X Status
48H
Reserved
Hdr Wr Ena
4CH
Reserved
50H
Reserved
54H
Message Control
Next Capability
MSI Cap ID
58H
5CH
Message Address
60H
Reserved
Message Data
64H
Power Management Capabilities
Next Capability
Pwr Mgt Cap ID
68H
Data
Reserved
Control and Status
Table 7-1 SiI3124 PCI Configuration Space
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