參數(shù)資料
型號(hào)： ORT8850L-3BM680C
廠商： Lattice Semiconductor Corporation
文件頁數(shù)： 67/105頁
文件大?。?/td> 0K
描述： IC FPSC TRANSCEIVER 8CH 680-BGA
產(chǎn)品變化通告： Product Discontinuation 01/Aug/2011
標(biāo)準(zhǔn)包裝： 24
系列： *
Lattice Semiconductor
ORCA ORT8850 Data Sheet
64
30023*
3003B
30053
3006B
30083
3009B
300B3
300CB
[0]
R/W
A1 A2 error
insert command
0
0 = Do not insert error.
1 = Insert error for number of frames in register 0x3000C.
The error insertion is based on a rising edge detector. As
such, the control must be set to value 0 before trying to
indicate a second A1, A2 corruption
[1]
R/W
B1 error insert
command
0.
0 = Do not insert error
1 = Insert error marked in register 0x3000F.
The error insertion is based on a rising edge detector. As
such, the control must be set to value 0 before trying to ini-
tiate a second B1 corruption.
[2]
R/W
disable B1 insert
0
0 = B1 is inserted in the transmit direction by the SONET
block
1 = B1 is not inserted in the transmit direction
[3]
R/W
disable A1/A2
insert
0
0 = A1/A2 is inserted in the transmit direction by the
SONET block
1 = A1/A2 is not inserted in the transmit direction
[4-7]
-
Not Used
0
30024*
3003C
30054
3006C
30084
3009C
300B4
300CC
[0:3]
R
concat indication
3, 6, 9, 12
0
The value 1 in any bit location indicates that STS# is in
CONCAT mode.
0 = Not in concatenation mode or is the head of concate-
nated group
1 = indicates the channel is concatenated
[4-7]
-
Not Used
0
30025*
3003D
30055
3006D
30085
3009D
300B5
300CD
[0:7]
R
concat indication
1, 4, 7, 10,
2, 5, 8, 11
0
The value 1 in any bit location indicates that STS# is in
CONCAT mode.
0 = Not in concatenation mode or is the head of concate-
nated group
1 = indicates the channel is concatenated
30026*
3003E
30056
3006E
30086
3009E
300B6
300CE
[0]
R
Channel alarm
bit
0
Set when any of the alarms in the channel alarm register
(0x30028) are set and the alarm is enabled. This alarm is
enabled in 0x30027 bit 0 for channel AA etc.
[1]
R
AIS-P ag
0
Set when any alarm for AIS-P is set and the corresponding
enable is set.
[2]
R
Pointer mover
elastic store
overow ag
0
Set when the elastic store in the pointer mover write and
read address is within 1 byte. Alarm enable is 0x30027 bit
2.
[3-7]
-
Not Used
0
Table 19. Memory Map Descriptions (Continued)
(0x)
Absolute
Address
Bit
Type
Name
Reset
Value
(0x)
Description
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參數(shù)描述
ORT8850L-3BMN680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 4992 LUT 278 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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