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MC68F375
TPU ROM FUNCTIONS
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
D-2
A new feature of the TPU3 microcode ROM is the existence of two entry tables in the
4 Kbytes of internal ROM. Each entry table has a set of sixteen functions and the user
defines which of the two tables the TPU3 will be able to access. Only one table can be
used at a time and functions from the two entry tables cannot be mixed. The default
entry table is located in bank zero. This table is identical to the standard microcode
ROM in the TPU2, so any CPU code written for the TPU2 will work unchanged on the
TPU3. The functions in the default entry table in bank zero are listed in Table 1.
The CPU selects which entry table to use by setting the ETBANK field in the
TPUMCR2 register. This register is write once after reset. Although one entry table is
specified at start-up, it is possible, in some cases, to use functions from both
tables without resetting the microcontroller. A customer may, for example, wish to use
the ID function from bank one to verify the TPU microcode version but then use the
MCPWM function from bank zero. As a customer will typically only run the ID function
during system configuration, and not again after that, the bank one entry table can be
changed to the bank zero entry table using the soft reset feature of the TPU3. The pro-
cedure should be:
1. Set ETBANK field in TPUMCR2 to %01 to select the entry table in bank one
2. Run the ID function
3. Stop the TPU3 by setting the STOP bit in the TPUMCR to one.
4. Reset the TPU3 by setting the SOFTRST bit in the TPUMCR2 register
5. Wait at least nine clocks
6. Clear the SOFTRST bit in the TPUMCR2 register
The TPU3 stays in reset until the CPU clears the SOFTRST bit. After the SOFTRST
bit has been cleared the TPU3 will be reset and the entry table in bank zero will be
Table D-1 Bank 0 Functions
Function Number
Function
Nickname
Function Name
$F
PTA
Programmable Time Accumulator
$E
QOM
Queued Output Match
$D
TSM
Table Stepper Motor
$C
FQM
Frequency Measurement
$B
UART
Universal Asynchronous Receiver/Transmitter
$A
NITC
New Input Capture/Input Transition Counter
9COMM
Multiphase Motor Commutation
8HALLD
Hall Effect Decode
7MCPWM
Multi-Channel Pulse Width Modulation
6FQD
Fast Quadrature Decode
5PPWA
Period/Pulse Width Accumulator
4OC
Output Compare
3PWM
Pulse Width Modulation
2DIO
Discrete Input/Output
1
SPWM
Synchronized Pulse Width Modulation
0SIOP
Serial Input/output Port
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Freescale Semiconductor, Inc.
For More Information On This Product,
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