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MC68F375
CONFIGURABLE TIMER MODULE (CTM9)
MOTOROLA
REFERENCE MANUAL
Rev. 25 June 03
13-50
13.8 Bus Interface Unit Submodule (BIUSM)
The bus interface unit submodule (BIUSM) allows all the CTM9 submodules to com-
municate to the IMB3 via the SMB (sub module bus).
13.8.1 Freeze Action on the BIUSM
When the IMB freeze condition is detected, the FRZ bit in the BIUSM module config-
uration register determines whether or not the freeze condition is passed on to the
other CTM submodules. If FRZ = 0, the freeze condition is ignored; if FRZ = 1, the
BIUSM passes the FREEZE signal from the IMB through to the CTM submodules.
Each CTM submodule then reacts to the FREEZE signal as defined by its own internal
circuitry and control bits.
13.8.2 LPSTOP Action on the BIUSM
When the CPU is stopped by an LPSTOP instruction (from CPU32 or CPU16), the sys-
tem clock (fSYS) is stopped, thereby shutting down all dependent modules, including
the CTM, until the low-power STOP mode is exited.
13.8.3 STOP and WAIT Action on the BIUSM
When the STOP instruction on CPU32 or the WAIT instruction on CPU16 is executed,
only the CPU is stopped; the CTM continues to operate as normal. (To stop the CTM
13.8.4 BIUSM Registers
The BIUSM register map comprises four 16-bit register locations. As shown in Table 13-18, the register block contains the three BIUSM registers and one reserved regis-
ter. The BIUSM register block always occupies the first four register locations in the
CTM register space and cannot be relocated within the CTM structure. All unused bits
and reserved address locations return zero when read by the software. Writing to
unused bits and reserved address locations has no effect.
PWM5C — PWM Counter Register
0xYF F22E
PWM6C
0xYF F236
PWM7C
0xYF F23E
PWM8C
0xYF F246
MSB
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
0
MSB
LSB
RESET:
0
1
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