參數(shù)資料
型號(hào)： DS3105LN+
廠商： Maxim Integrated Products
文件頁數(shù)： 6/124頁
文件大?。?/td> 0K
描述： IC TIMING LINE CARD 64-LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 160
類型： 定時(shí)卡 IC，多路復(fù)用器
PLL： 是
主要目的： 以太網(wǎng)，SONET/SDH，Stratum，電信
輸入： CMOS，LVDS，LVPECL，TTL
輸出： CMOS，LVDS，LVPECL，TTL
電路數(shù)： 1
比率 - 輸入:輸出： 5:2
差分 - 輸入:輸出： 無/是
頻率 - 最大： 312.5MHz
電源電壓： 1.62 V ~ 1.98 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
DS3105
103
Register Name:
INTCR
Register Description:
Interrupt Configuration Register
Register Address:
7Dh
Bit #
7
6
5
4
3
2
1
0
Name
—
LOS
GPO
OD
POL
Default
0
1
0
Bit 3: INTREQ Pin Mode (LOS). When GPO = 0, this bit selects the function of the INTREQ pin.
0 = The INTREQ/LOS pin indicates interrupt requests
1 = The INTREQ/LOS pin indicates the real-time state of the selected reference activity monitor (see
Section 7.5.3). This function is most useful when external switching mode (Section 7.6.5) is enabled
(MCR10:EXTSW = 1).
Bit 2: INTREQ Pin General-Purpose Output Enable (GPO). When set to 1, this bit configures the interrupt
request pin to be a general-purpose output whose value is set by the POL bit.
0 = INTREQ is function determined by the LOS bit.
1 = INTREQ is a general-purpose output.
Bit 1: INTREQ Pin Open-Drain Enable (OD)
When GPO = 0:
0 = INTREQ is driven in both inactive and active states.
1 = INTREQ is driven high or low in the active state but is high impedance in the inactive state.
When GPO = 1:
0 = INTREQ is driven as specified by POL.
1 = INTREQ is high impedance and POL has no effect.
Bit 0: INTREQ Pin Polarity (POL)
When GPO = 0:
0 = INTREQ goes low to signal an interrupt request or LOS = 1 (active low).
1 = INTREQ goes high to signal interrupt request or LOS = 1 (active high).
When GPO = 1:
0 = INTREQ driven low.
1 = INTREQ driven high.
Register Name:
PROT
Register Description:
Protection Register
Register Address:
7Eh
Bit #
7
6
5
4
3
2
1
0
Name
PROT[7:0]
Default
1
0
1
0
1
Bits 7 to 0: Protection Control (PROT[7:0]). This field can be used to protect the rest of the register set from
inadvertent writes. In protected mode writes to all other registers are ignored. In single unprotected mode, one
register (other than PROT) can be written, but after that write the device reverts to protected mode (and the value
of PROT is internally changed to 00h). In fully unprotected mode all register can be written without limitation. See
Section 7.2.
1000 0101 = Fully unprotected mode
1000 0110 = Single unprotected mode
All other values = Protected mode
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