REV. 1.0.1 L4 LOSPECL_P I LVPEC L Loss of Optical Carrier/Signal Input - Single-End" />
參數(shù)資料
型號： XRT94L31IB-L
廠商： Exar Corporation
文件頁數(shù)： 40/133頁
文件大小： 0K
描述： IC MAPPER DS3/E3/STS-1 504TBGA
標(biāo)準(zhǔn)包裝： 24
應(yīng)用： 網(wǎng)絡(luò)切換
接口： 總線
電源電壓： 3.14 V ~ 3.47 V
封裝/外殼： 504-LBGA
供應(yīng)商設(shè)備封裝： 504-TBGA（35x35）
包裝： 托盤
安裝類型： 表面貼裝
XRT94L31
14
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
L4
LOSPECL_P
I
LVPEC
L
Loss of Optical Carrier/Signal Input - Single-Ended PECL Interface
Input - Primary Receive STS-3/STM-1 PECL Interface:
If the user is using an Optical Transceiver that contains an LOS (or Sig-
nal Detect) output pin that is of the LVPECL format, then connect this
LOS output signal to this input pin of the XRT94L31.
Configure the LOSPECL_P input pin to function as either an active-low
or active-low signal by pulling the LOSTTL input pin to the appropriate
level as described below.
If this input pin is pulled to the appropriate state such that LOS is TRUE,
then all of the following events will happen.
The Primary Receive STS-3 TOH Processor block will declare the
Loss of Optical Carrier condition.
The Primary Receive STS-3/STM-1 Line Interface block will declare
the LOS_Detect condition.
NOTE: If this input pin is pulled to the appropriate state such that LOS is
TRUE, this (by itself) will NOT cause the Primary Receive STS-3
TOH Processor block to declare the LOS defect condition.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
Description of
LOSPECL_P
Setting this input pin "low"
configures the Receive Line
Interface block to declare the
"LOS_Detect" condition.
Setting this input pin "high"
configures the Receive Line
Interface block to declare the
"LOS_Detect" condition.
LOSPECL_P
Active-Low/
Active-High
Active-Low
Active-High
LOSTTL
GND
VDD
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