XRT94L31
82
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
AG12
STS1RXD_D7_2
RXHDLCDAT_7_2
RXDS3CLK_2
O
CMOS
Receive STS-1 Telecom Bus - Channel 2 - Output Data Bus pin num-
ber 7:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface, associated with Channel 2 is enabled.
If STS-1 Telecom Bus (Channel 2) has been enabled
- STS-1 Receive Telecom Bus - Output Data bus pin number 7:
STS1RXD_D7_2
This output pin along with STS1RXD_D_2[6:0] function as the STS-1
Receive (Drop) Telecom Bus - Output Data Bus for Channel 2. The
STS-1 Telecom Bus Interface will update the data via this output upon
the rising edge of STS1RXD_CK_2.
NOTE: This output pin functions as the MSB (Most Significant Bit) for the
STS-1 Receive (Drop) Telecom Bus Interface - Output Data Bus
(Channel 2).RXHDLCDAT_7_2 (Receive HDLC block data
output - Channel 2 - Output Data Bus pin 7)RXDS3CLK_2
(Receive DS3 clock - Channel 2)
RECEIVE TRANSPORT OVERHEAD INTERFACE
AD5
RxTOHClk
O
CMOS
Receive TOH Output Port - Clock Output:
This output pin, along with RxTOH, RxTOHValid and RxTOHFrame func-
tion as the Receive TOH Output Port.
The Receive TOH Output Port permits is used to obtain the value of the
TOH Bytes, within the incoming STS-3/STM-1 signal.
This output pin provides the user with a clock signal. If the RxTOHValid
output pin is "High", then the contents of the TOH bytes, within the
incoming STS-3 data-stream will be serially output via the RxTOH out-
put.
This data will be updated upon the falling edge of this clock signal.
Therefore, the user is advised to sample the data (at the RxTOH output
pin) upon the rising edge of this clock output signal.
AC7
RxTOHValid
O
CMOS
Receive TOH Output Port - TOH Valid (or READY) indicator:
This output pin, along with RxTOH and RxTOHFrame function as the
Receive TOH Output Port.
This output pin will toggle "High" whenever valid TOH data is being out-
put via the RxTOH output pin.
AE4
RxTOH
O
CMOS
Receive TOH Output port - Output pin:
This output pin, along with RxTOHClk, RxTOHValid and RxTOHFrame
function as the Receive TOH Output port.
All TOH data that resides within the incoming STS-3 data-stream will be
output via this output pin.
The RxTOHValid output pin will toggle "High", coincident with anytime a
bit (from the Receive STS-3 TOH data) is being output via this output
pin.
The RxTOHFrame output pin will pulse "High" (for eight periods of
RxTOHClk) coincident to when the A1 byte is being output via this output
pin.
Data, on this output pin, is updated upon the falling edge of RxTOHClk.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION