參數(shù)資料
型號： DS2196LN
廠商： DALLAS SEMICONDUCTOR
元件分類： Digital Transmission Controller
英文描述： DATACOM, FRAMER, PQFP100
封裝： LQFP-100
文件頁數(shù)： 27/160頁
文件大?。?/td> 559K
代理商： DS2196LN
DS2196
122 of 160
Normally, the clock that is output at the RCLKLO pin is the recovered clock from the T1 AMI/B8ZS
waveform presented at the RTIP and RRING inputs.
When no AMI signal is present at RTIP and
RRING, a Receive Carrier Loss (LRCL) condition will occur and the RCLKLO will be sourced from the
clock applied at the MCLK pin. If the jitter attenuator is either placed in the transmit path or is disabled,
the RCLKLO output can exhibit slightly shorter high cycles of the clock. This is due to the highly over
sampled digital clock recovery circuitry. If the jitter attenuator is placed in the receive path (as is the case
in most applications), the jitter attenuator restores the RCLK to being close to 50% duty cycle. Please see
the Receive AC Timing Characteristics in Section 22 for more details.
19.2
TRANSMIT WAVESHAPING AND LINE DRIVING
The DS2196 uses a set of laser–trimmed delay lines along with a precision Digital–to–Analog Converter
(DAC) to create the waveforms that are transmitted onto the T1 line. The waveforms created by the
DS2196 meet the latest ANSI, AT&T, and ITU specifications. See Figure 19–3. The user will select
which waveform is to be generated by properly programming the LBOS3/LBOS2/LBOS1/LBOS0 bits in
the Line Interface Control Register (LICR). The DS2196 can set up in a number of various configurations
depending on the application. See Table 19–1 and Figure 19–1.
Table 19-1: LINE BUILD OUT SELECT IN LICR
LBO
S3
LBO
S2
LBO
S1
LBO
S0
LINE BUILD OUT
APPLICATION
0
0 to 133 feet/
DSX–1/0dB CSU
0
1
133 feet to 266
DSX–1
0
1
0
266 feet to 399
DSX–1
0
1
399 feet to 533
DSX–1
0
1
0
533 feet to 655
DSX–1
0
1
0
1
–7.5 dB
CSU
0
1
0
–15 dB
CSU
0
1
–22.5 dB
CSU
1
0
Square Wave Output
Custom Wave shape
1
0
1
Open Drain Output Driver
Enable
Custom Wave shape
NOTE:
LBOS3 is located at CCR7A.0.
Due to the nature of the design of the transmitter in the DS2196, very little jitter (less then 0.005 UIpp
broadband from 10 Hz to 100 kHz) is added to the jitter present on TCLKLI. Also, the waveforms that
they create are independent of the duty cycle of TCLKLI. The transmitter in the DS2196 couples to the
T1 transmit twisted pair via a 1:2 step up transformer for the as shown in Figure 19–1. In order for the
devices to create the proper waveforms, this transformer used must meet the specifications listed in Table
19–2.
相關(guān)PDF資料
PDF描述
DS21FF44 DATACOM, FRAMER, PBGA300
DS21FF44N DATACOM, FRAMER, PBGA300
DS21FT40N DATACOM, FRAMER, PBGA300
DS21FT40 DATACOM, FRAMER, PBGA300
DS21FT42 DATACOM, FRAMER, PBGA300
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2196LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Dual Framer LIU RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS219T 功能描述:烙鐵 DESOLDERING HEAD RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included
DS21E352 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21E352N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21E354 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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