參數(shù)資料
型號(hào): ADUC7126BSTZ126-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 24/108頁(yè)
文件大?。?/td> 0K
描述: IC MCU 16/32B 126KB FLASH 80LQFP
標(biāo)準(zhǔn)包裝: 1,000
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 41.78MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 40
程序存儲(chǔ)器容量: 126KB(63K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x12b,D/A 4x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 80-LQFP
包裝: 帶卷 (TR)
ADuC7124/ADuC7126
Data Sheet
Rev. C | Page 22 of 108
Pin No.
Mnemonic
Description
62
P1.1/SPM1/SOUT0/I2C0SDA/PLAI[1]
General-Purpose Input and Output Port 1.1 (P1.1).
Serial Port Multiplexed (SPM1).
UART0 Output (SOUT0).
I2C0 (I2C0SDA).
Programmable Logic Array Input Element 1 (PLAI[1]).
63
P1.0/T1/SPM0/SIN0/I2C0SCL/PLAI[0]
General-Purpose Input and Output Port 1.0 (P1.0).
Timer1 Input (T1).
Serial Port Multiplexed (SPM0).
UART0 Input (SIN0).
I2C0 (I2C0SCL).
Programmable Logic Array Input Element 0 (PLAI[0]).
64
P4.2/AD10/PLAO[10]
General-Purpose Input and Output Port 4.2 (P4.2).
External Memory Interface (AD10).
Programmable Logic Array Output Element 10 (PLAO[10]).
65
P4.3/AD11/PLAO[11]
General-Purpose Input and Output Port 4.3 (P4.3).
External Memory Interface (AD11).
Programmable Logic Array Output Element 11 (PLAO[11]).
66
P4.4/AD12/PLAO[12]
General-Purpose Input and Output Port 4.4 (P4.4).
External Memory Interface (AD12).
Programmable Logic Array Output Element 12 (PLAO[12]).
67
P4.5/AD13/PLAO[13]/RTCK
General-Purpose Input and Output Port 4.5 (P4.5).
External Memory Interface (AD13).
Programmable Logic Array Output Element 13 (PLAO[13]).
JTAG Return Test Clock (RTCK).
68
IOVDD
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
69
IOGND
Ground for GPIO. Typically connected to DGND.
70
VREF
2.5 V Internal Voltage Reference. Must be connected to a 0.47 μF capacitor when using
the internal reference.
71
DACREF
External Voltage Reference for the DACs. Range: DACGND to DACVDD.
72
AVDD
3.3 V Analog Power.
73, 74
AGND
Analog Ground. Ground reference point for the analog circuitry.
75
GNDREF
Ground Voltage Reference for the ADC. For optimal performance, the analog power
supply should be separated from IOGND and DGND.
76
ADC11
Single-Ended or Differential Analog Input 11.
77
ADC0
Single-Ended or Differential Analog Input 0.
78
ADC1
Single-Ended or Differential Analog Input 1.
79
ADC2/CMP0
Single-Ended or Differential Analog Input 2 (ADC2).
Comparator Positive Input (CMP0).
80
ADC3/CMP1
Single-Ended or Differential Analog Input 3 (ADC3).
Comparator Negative Input (CMP1).
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