參數(shù)資料
型號(hào)： UDA1352HL
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： 48 kHz IEC 60958 audio DAC
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁(yè)數(shù)： 37/64頁(yè)
文件大小： 262K
代理商： UDA1352HL
2003 Mar 25
37
Philips Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352HL
12.6
Sound feature mode, treble and bass boost settings (write)
Table 35
Register address 12H
Table 36
Description of register bits
Table 37
Sound feature mode
Table 38
Treble settings
BIT
15
14
13
12
11
10
9
8
Symbol
Default
M1
0
M0
0
TR1
0
TR0
0
BB3
0
BB2
0
BB1
0
BB0
0
BIT
7
6
5
4
3
2
1
0
Symbol
Default
BIT
SYMBOL
DESCRIPTION
15 to 14
M[1:0]
Sound feature mode.
A 2-bit value to program the sound processing filter mode for treble,
and bass boost settings. Default value 00; see Table 37.
Treble settings.
A 2-bit value to program the treble setting. The sound processing filter
mode is selected by the sound feature mode bits. Default value 00; see Table 38.
Bass boost settings.
A 4-bit value to program the bass boost setting. The sound
processing filter mode is selected by the sound feature mode bits. Default value 0000;
see Table 39.
reserved
13 to 12
TR[1:0]
11 to 8
BB[3:0]
7 to 0
M1
M0
MODE SELECTION
0
0
1
1
0
1
0
1
flat set (default)
minimum set
maximum set
TR1
TR0
FLAT SET (dB)
MINIMUM SET (dB)
MAXIMUM SET (dB)
0
0
1
1
0
1
0
1
0
0
0
0
0
2
4
6
0
2
4
6
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