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參數(shù)資料
| 型號(hào)： | UDA1352HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | 48 kHz IEC 60958 audio DAC |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48 |
| 文件頁數(shù)： | 20/64頁 |
| 文件大?。?/td> | 262K |
| 代理商： | UDA1352HL |
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2003 Mar 25
20
Philips Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352HL
9.4
Data write mode
The data write mode is explained in the signal diagram of
Fig.6. To write data to a device requires four bytes to be
sent (see Table 7):
1.
One byte starting with ‘01’ specifying a write action,
followed by the device address (‘011000’ for the
UDA1352HL default)
2.
One byte starting with ‘0’ specifying a write action,
followed by seven bits specifying the device register
address in binary format, with A6 being the MSB
and A0 being the LSB
3.
First of two data bytes with D15 being the MSB
4.
Second of two data bytes with D0 being the LSB.
Note that to write data to a different register within the
same device requires the device address to be sent again.
9.5
Data read mode
The data read mode is explained in the signal diagram of
Fig.7. To read data from a device requires a prepare read
followed by a data read. Six bytes are used, (see Table 8):
1.
One byte starting with ‘01’ specifying a prepare read
action to the device, followed by the device address
One byte starting with ‘1’ specifying a read action,
followed by seven bits specifying the device register
address from which data needs to be read, followed by
seven bits specifying the source register address in
binary format, with A6 being the MSB and A0 being
the LSB
One byte starting with ‘11’ instructing the device to
write data to the microcontroller, followed by the
device address
One byte, sent by the device to the bus, starting with
either a logic 0 to indicate that the requesting register
is valid, or a logic 1 to indicate that the requesting
register is invalid, followed by the requesting register
address
First of two data bytes, sent by the device to the bus,
with D15 being the MSB
Second of two bytes, sent by the device to the bus,
with D0 being the LSB.
2.
3.
4.
5.
6.
Table 7
L3-bus write data
Table 8
L3-bus read data
BYTE
L3-BUS
MODE
ACTION
FIRST IN TIME
LAST IN TIME
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
1
2
3
4
address
data transfer
data transfer
data transfer
device address
register address
data byte 1
data byte 2
0
0
1
DA0
A5
D13
D5
DA1
A4
D12
D4
1
0
0
0
A6
D14
D6
A3
D11
D3
A2
D10
D2
A1
D9
D1
A0
D8
D0
D15
D7
BYTE
L3-BUS
MODE
ACTION
FIRST IN TIME
LAST IN TIME
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
1
2
3
4
address
data transfer
address
data transfer
device address
register address
device address
requesting register
address
data byte 1
data byte 2
0
1
1
1
DA0
A5
DA0
A5
DA1
A4
DA1
A4
1
0
0
0
A6
1
A6
A3
1
A3
A2
0
A2
A1
0
A1
A0
0
A0
0 or 1
5
6
data transfer
data transfer
D15
D7
D14
D6
D13
D5
D12
D4
D11
D3
D10
D2
D9
D1
D8
D0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UDA1352TS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:48 kHz IEC 60958 audio DAC |
| UDA1352TS/N3 | 制造商:NXP Semiconductors 功能描述:IC DAC AUDIO 48KHZ 28-SSOP 制造商:NXP Semiconductors 功能描述:IC, DAC, AUDIO, 48KHZ, 28-SSOP, Resolution (Bits):20bit, Input Channel Type:Seri |
| UDA1352TS/N3,112 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC DAC 2CH Interpolatio Filter 28-Pin RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| UDA1352TS/N3,118 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC DAC 2CH Interpolatio Filter 28-Pin RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| UDA1352TS/N3112 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
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