參數(shù)資料
型號(hào)： UDA1352HL
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： 48 kHz IEC 60958 audio DAC
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁數(shù)： 21/64頁
文件大?。?/td> 262K
代理商： UDA1352HL
2003 Mar 25
21
Philips Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352HL
9.6
Initialization string
For correct and reliable operation, the UDA1352HL must be initialized in the L3-bus mode. This is required to ensure that
the PLL always starts up, under all conditions, after the device is powered up. The initialization string is given in Table 9.
Table 9
L3-bus initialization string and set defaults after power-up
10 I
2
C-BUS DESCRIPTION
10.1
Characteristics of the I
2
C-bus
The I
2
C-bus allows 2-way, 2-line communication between different ICs or modules, using a serial data line (SDA) and a
serial clock line (SCL). Both lines must be connected to the V
DD
via a pull-up resistor when connected to the output
stages of a microcontroller. For a 400 kHz IC you must follow Philips Semiconductors recommendations for this type of
bus, (e.g. a pull-up resistor can be used for loads on the bus of up to 200 pF, and a current source or switched resistor
must be used for loads from 200 to 400 pF). Data transfer can only be initiated when the bus is not busy.
10.2
Bit transfer
One data bit is transferred during each clock pulse (see Fig.8). The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals. The maximum
clock frequency is 400 kHz. To run at this frequency requires all inputs and outputs connected to this high-speed I
2
C-bus
to be designed according to specification “The I
2
C-bus and how to use it” (order code 9398 393 40011).
BYTE
L3-BUS
MODE
ACTION
FIRST IN TIME
LAST IN TIME
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
1
2
3
4
5
6
7
8
address
data transfer
data transfer
data transfer
address
data transfer
data transfer
data transfer
initialization
string
device address
register address
data byte 1
data byte 2
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
0
DA0
0
0
0
DA0
1
0
0
DA1
0
0
0
DA1
1
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
0
0
set defaults device address
register address
data byte 1
data byte 2
handbook, full pagewidth
MBC621
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig.8 Bit transfer on the I
2
C-bus.
相關(guān)PDF資料
PDF描述
UDA1360 Low-voltage low-power stereo audio ADC
UDA1360TS Low-voltage low-power stereo audio ADC
UDA1361 96 kHz sampling 24-bit stereo audio ADC
UDA1380 Stereo audio coder-decoder for MD, CD and MP3
UDA1380TT Stereo audio coder-decoder for MD, CD and MP3
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UDA1352TS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:48 kHz IEC 60958 audio DAC
UDA1352TS/N3 制造商:NXP Semiconductors 功能描述:IC DAC AUDIO 48KHZ 28-SSOP 制造商:NXP Semiconductors 功能描述:IC, DAC, AUDIO, 48KHZ, 28-SSOP, Resolution (Bits):20bit, Input Channel Type:Seri
UDA1352TS/N3,112 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC DAC 2CH Interpolatio Filter 28-Pin RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
UDA1352TS/N3,118 功能描述:數(shù)模轉(zhuǎn)換器- DAC DAC 2CH Interpolatio Filter 28-Pin RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
UDA1352TS/N3112 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*