參數(shù)資料
型號(hào)： UDA1352HL
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： 48 kHz IEC 60958 audio DAC
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁(yè)數(shù)： 17/64頁(yè)
文件大?。?/td> 262K
代理商： UDA1352HL
2003 Mar 25
17
Philips Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352HL
8.7.2
L3-
BUS OR
I
2
C-
BUS MODES
The L3-bus or I
2
C-bus modes allow maximum flexibility for controlling the UDA1352HL.
The default values for all non pin-controlled settings are identical to the default values at start-up in the L3-bus or I
2
C-bus
modes. The default values are given in Section 12.
It should be noted that in either L3-bus or I
2
C-bus mode, several base-line functions are still controlled by static pins
(see Table 5). However, in L3-bus or I
2
C-bus modes, on start-up, the output is muted only by bit MT in register
address 13H via the L3-bus or I
2
C-bus interfaces.
Table 5
Pin descriptions in L3-bus or I
2
C-bus modes
PIN
NAME
VALUE
FUNCTION
Mode selection pins
38
47
SELSTATIC
SELIIC
0
0
1
select L3-bus mode or I
2
C-bus mode; must be connected to V
SSD
select L3-bus mode; must be connected to V
SSD
select I
2
C-bus mode; must be connected to V
DDD
Input pins
1
RESET
0
1
0
1
normal operation
reset
must be connected to the L3-bus
must be connected to the SDA line of the I
2
C-bus
must be connected to the L3-bus
must be connected to the SCL line of the I
2
C-bus
must be connected to the L3-bus
no mute
mute active
5
L3DATA
6
L3CLOCK
10
13
L3MODE
MUTE
Status pins
43
PCMDET
0
1
0
non-PCM data or burst preamble detected
PCM data detected
clock regeneration and IEC 60958 decoder out-of-lock or non-PCM
data detected
clock regeneration and IEC 60958 decoder locked and PCM data
detected
IEC 60958 input; no pre-emphasis
IEC 60958 input; f
s
= 32.0 kHz with pre-emphasis
IEC 60958 input; f
s
= 44.1 kHz with pre-emphasis
IEC 60958 input; f
s
= 48.0 kHz with pre-emphasis
23
LOCK
1
33 and 45
PREEM1and
PREEM0
00
01
10
11
Test pins
25
TEST
0
must be connected to V
SSD
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