參數(shù)資料
型號： TVP3026-175M
廠商： Texas Instruments, Inc.
英文描述： Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
中文描述： 視頻接口調(diào)色板Exract（組合像素模式視頻接口調(diào)色器）
文件頁數(shù)： 60/107頁
文件大小： 707K
代理商： TVP3026-175M
2–46
2.15.7
Color-Key (Overlay, Red, Green, Blue) Registers (Index: 0x30–0x37,
Access: R/W, Default: Uninitialized)
These registers specify the color comparison ranges for the four direct-color data fields when performing
color-key switching. A low and a high register are provided for each of the four data fields to facilitate the
range comparison. See subsection 2.8.2, Color-Key Switching for more details on their usage. There are
eight registers total, two for each color and associated overlay. The formats for both low and high registers
are shown in Table 2-32. Values 0 to 0xFF may be written into the four color-key-low and four color-key-high
registers.
Table 2–32.
Color-Key Low and High Registers
COLOR-KEY LOW
Data Bit
D7
D6
D5
D4
D3
D2
D1
D0
Low Value
L7
L6
L5
L4
L3
L2
L1
L0
Index = 0x30, 0x32, 0x34, and 0x36
COLOR-KEY HIGH
Data Bit
D7
D6
D5
D4
D3
D2
D1
D0
High Value
H7
H6
H5
H4
H3
H2
H1
H0
Index = 0x31, 0x33, 0x35, and 0x37
2.15.8
CRC Remainder LSB and MSB Registers (Index: 0x3C–0x3D,
Access: Read Only, Default: Uninitialized)
These registers read the result of the 16-bit CRC calculation (see subsection 2.11.1, 16-Bit CRC). They are
not initialized and can be read by the MPU at any time. The CRC is updated when two consecutive HSYNC
pulses are detected while BLANK is active (vertical retrace). The CRC is only calculated on the active screen
area, i.e., active blanking stops the calculation, see Table 2-33. One complete vertical screen must be
completed to generate a valid CRC.
Table 2–33.
CRC Remainder LSB and MSB Registers
CRC MSB
CRC LSB
Data Bit
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
CRC Remainder
R15
R14
R13
R12
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
Index = 0x3D
Index = 0x3C
2.15.9
CRC Bit Select Register (Index: 0x3E, Access: Write Only,
Default: Uninitialized)
This write-only register specifies which of the 24 DAC data lines the 16-bit CRC should be calculated on (see
subsection 2.11.1, 16-Bit CRC). The register is not initialized and can be written to by the MPU at any time.
The CRC bit select register data format is shown in Table 2-34. Values from 0 to 23 (0x17) may be written
into the register to select the appropriate data line.
Table 2–34. CRC Bit Select Register
BIT NAME
VALUES
DESCRIPTION
BSR7–BSR5
000
Reserved
BSR4 BSR0
BSR4–BSR0
0x00–0x07: red0–red7
CRC control code BSR4 BSR0 selects one of the 24 DAC input
CRC control code. BSR4–BSR0 selects one of the 24 DAC input
lines as the input to the CRC calculation.
0x08–0x0F: green0–green7
0x10–0x17: blue0–blue7
相關(guān)PDF資料
PDF描述
TVP3026-220 Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
TVP3026-250 Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP3026-175MDN 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
TVP3026-175MHFG 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
TVP3026-175MHFGB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
TVP3026-175PCE 制造商:Rochester Electronics LLC 功能描述:- Bulk
TVP3026-220AMDN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Video Interface Palette
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