參數(shù)資料
型號(hào): TVP3026-175M
廠商: Texas Instruments, Inc.
英文描述: Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
中文描述: 視頻接口調(diào)色板Exract(組合像素模式視頻接口調(diào)色器)
文件頁數(shù): 51/107頁
文件大?。?/td> 707K
代理商: TVP3026-175M
2–37
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Overscan Border
OVS
BLANK
Display Area
Figure 2–10. Overscan
2.10 Horizontal Zooming
The TVP3026 supports a user-programmable horizontal zooming function of 2, 4, 8, 16, or 32
×
.
Zooming
is controlled through the CKC5–CKC7 bits of the color-key control register (index: 0x38, see subsection
2.15.7, Color-Key Control Register for the color-key control register definition).
When one of the horizontal zoom factors (other than 1
×
) is chosen, the internal pixel multiplexer is configured
so that it replicates the pixel data on successive dot clocks by the number of times specified by
CKC5–CKC7. Also, the RCLK frequency must be modified by changing the loop clock PLL registers to load
pixel data at the new reduced rate. The new RCLK frequency should be chosen as the old RCLK frequency
divided by the zoom factor.
The horizontal zoom function applies only to the pixel port (P63–P0) data. VGA data cannot be zoomed.
The maximum zoom factor for all packed-24 modes is 8
×
.
When zooming in 5:4 packed-24 mode, the latch
control register setting depends on the zoom factor as described in subsection 2.15.6, Latch-Control
Register
2.11 Test Functions
The TVP3026 provides several functions that enable system testing and verification. These are detailed in
subsection 2.11.1, 16-Bit CRC through subsection 2.11.4, Silicon Revision
2.11.1
A 16-bit cyclic redundancy check (CRC) is provided so that video data integrity can be verified at the input
to the DACs. The CRC is updated when two consecutive horizontal sync (HSYNC) pulses are detected while
blanking is active (vertical retrace). For the use of the CRC function, HSYNC must be active low at the input
to the TVP3026. The CRC is only calculated on the active screen area, i.e., active blanking stops the
calculation. One complete vertical screen must be completed to generate a valid CRC.
16-Bit CRC
The CRC can be performed on any of the 24 data lines that enter the DACs and is controlled by the CRC
bit select register (index: 0x3E). Values from 0 to 23 (0x17) may be written to this register to select between
相關(guān)PDF資料
PDF描述
TVP3026-220 Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
TVP3026-250 Video Interface PALETTE Exract(組合像素模式視頻接口調(diào)色器)
TX24 60.8 MM 5 X 8 DOT MATRIX DISPLAYS
TXB0102DCTR 2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR WITH AUTO DIRECTION SENSING AND 【15-kV ESD PROTECTION
TXB0102DCTT 2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR WITH AUTO DIRECTION SENSING AND 【15-kV ESD PROTECTION
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