參數(shù)資料
型號: ST20GP1
英文描述: MAX 7000 CPLD 256 MC 208-PQFP
中文描述: GPS處理器
文件頁數(shù): 87/116頁
文件大?。?/td> 1107K
代理商: ST20GP1
ST20-GP1
87/116
PComp
PIO port base address + #50
Read/Write
Bit
Bit field
Function
0
PComp0
Value to which input data bit 0 will be compared.
1
PComp1
Value to which input data bit 1 will be compared.
2
PComp2
Value to which input data bit 2 will be compared.
3
PComp3
Value to which input data bit 3 will be compared.
4
PComp4
Value to which input data bit 4 will be compared.
5
PComp5
Value to which input data bit 5 will be compared.
Table 14.4
PComp
register format
PMask
PIO port base address + #60
Read/Write
Bit
Bit field
Function
0
PMask0
When set to 1, the compare function for the internal interrupt for the port is enabled.
When enabled, if input data bit 0 is different to
PComp0
then an interrupt is generated.
1
PMask1
When set to 1, the compare function for the internal interrupt for the port is enabled.
When enabled, if input data bit 1 is different to
PComp1
then an interrupt is generated.
2
PMask2
When set to 1, the compare function for the internal interrupt for the port is enabled.
When enabled, if input data bit 2 is different to
PComp2
then an interrupt is generated.
3
PMask3
When set to 1, the compare function for the internal interrupt for the port is enabled.
When enabled, if input data bit 3 is different to
PComp3
then an interrupt is generated.
4
PMask4
When set to 1, the compare function for the internal interrupt for the port is enabled.
When enabled, if input data bit 4 is different to
PComp4
then an interrupt is generated.
5
PMask5
When set to 1, the compare function for the internal interrupt for the port is enabled.
When enabled, if input data bit 5 is different to
PComp5
then an interrupt is generated.
Table 14.5
PMask
register format
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