參數(shù)資料
型號: ST20GP1
英文描述: MAX 7000 CPLD 256 MC 208-PQFP
中文描述: GPS處理器
文件頁數(shù): 14/116頁
文件大?。?/td> 1107K
代理商: ST20GP1
ST20-GP1
14/116
PRNcode0-11 registers
The
PRNcode0-11
registers choose the code for the particular satellite, and writing these causes a
reset to the accumulated carrier phase in the NCO for the corresponding channel, if enabled by the
DSPControl
register.
The bit-fields for selecting particular GPS satellites are given in Table 3.3.
DSPControl
DSP base address + #140
Write only
Bit
Bit field
Function
1:0
SampleRate
These bits control the sampling rate (the rate at which data is sent to the DMA
controller). The encoding of these bits is as follows:
SampleRate[1:0]
Transfer period
No. of samples
accumulated
Mode
00
01
10
11
840
μ
s
970
μ
s
31
μ
s
62
μ
s
256
256
Tracking
8
Acquisition
16
2
NCOResetEnable
When set to 1, the accumulated NCO phase for a channel is reset when the corre-
sponding PRN code register is written.
When set to 1, all PRN generators are disabled.
Table 3.1
DSPControl
register format
3
PRNDisable
PRNcode0-11
DSP base address + #00 to #2C
Write only
Bit
Bit field
Function
6:0
PRNcode
Satellite code as a 7-bit value.
Table 3.2
PRNcode0-11
register format
Satellite ID
PRNcode0-11
register value
Taps selected from G2 shift register
a
by bits 6 to 4
by bits 3 to 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
#62
#73
#04
#15
#11
#22
#01
#12
#23
#32
#43
#65
#76
#07
#18
6
7
8
9
9
10
8
9
10
3
4
6
7
8
9
2
3
4
5
1
2
1
2
3
2
3
5
6
7
8
Table 3.3
PRNcode0-11
register value
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