參數(shù)資料
型號： ST20GP1
英文描述： MAX 7000 CPLD 256 MC 208-PQFP
中文描述： GPS處理器
文件頁數(shù)： 16/116頁
文件大小： 1107K
代理商： ST20GP1
ST20-GP1
16/116
The 19-bit value comprises three fields. The 3 least significant bits represent the fractional-delay in
eighths of a code-chip. The middle 10 bits represent the integer delay in code-chips, 0-1022, with
the value 1023 illegal. The upper 6 most significant bits represent the delay in integer milliseconds.
Note also that the eighth-chip resolution of the code generator is not sufficient for positioning. At
125 ns it represents approximately 40 m of range, over 100 m of position. The software must
maintain the range measurements around the 1 ns resolution level in a 32-bit field, and send an
appropriate 19-bit sub-field to the register. Note, care must be taken when calculating this field from
a computed delay, or vice versa, to allow for the missing value 1023. The overall register bit-field
cannot be used mathematically as a single binary number.
PRNphase0-11WrEn registers
The
PRNphase0-11WrEn
flags are active low flags that record when the
PRNphase0-11
register
can be updated. The
PRNphaseWrEn
flag for a channel is set high when the corresponding
PRNphase
register is written. The flag is reset again when the value written is loaded into the PRN
generator. Note, the
PRNphase0-11
register should only be updated when the
PRNphase0-
11WrEn
register has been cleared by the hardware.
NCOfrequency0-11 registers
The
NCOfrequency0-11
registers hold a signed 18-bit value that is added repetitively, ignoring
overflows, to the accumulated NCO phase from which the NCO sine and cosine waveforms are
generated. The addition is performed at a 264 KHz rate (16.368MHz/62). The accumulated NCO
phase is not accessible to the software, but can be cleared when initialising the channel if enabled
by the
DSPControl
register.
Each unit value in the
NCOfrequency0-11
register represents 264KHz/(2
18
), i.e.
1.007080078125 Hz.
If the extreme values are written, #1FFFF and #20000, the sine wave generated will be at
approximately +132 KHz, and precisely -132 KHz respectively.
PRNphase0-11
DSP base address + #40 to #6C
Write only
Bit
Bit field
Function
2:0
12:3
18:13
FractionalDelay
IntegerDelay
Delay
Fractional delay in eighths of a code-chip.
Integer delay in code-chips. Value 0-1022. Note, the value 1023 is illegal.
Delay in integer milliseconds.
Table 3.4
PRNphase0-11
register format
PRNphase0-11WrEn
DSP base address + #40 to #6C
Read only
Bit
Bit field
Function
0
PRNphaseWrEn
Set when the corresponding
PRNphase0-11
register is set.
Table 3.5
PRNphase0-11WrEn
register format
NCOfrequency0-11
DSP base address + #80 to #AC
Write only
Bit
Bit field
Function
17:0
NCOfrequency
NCO frequency as a signed 18-bit value.
Table 3.6
NCOfrequency0-11
register format
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相關(guān)代理商/技術(shù)參數(shù)
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