參數(shù)資料
型號: ST20GP1
英文描述: MAX 7000 CPLD 256 MC 208-PQFP
中文描述: GPS處理器
文件頁數(shù): 5/116頁
文件大小: 1107K
代理商: ST20GP1
ST20-GP1
5/116
1
Introduction
The ST20-GP1 is an application-specific single chip micro using the ST20 CPU with
microprocessor style peripherals added on-chip. It incorporates DSP hardware for processing the
signals from GPS (Global Positioning System) satellites.
The twelve channel GPS correlation DSP hardware is designed to handle twelve satellites, two of
which can be initialized to support the RTCA-SC159 specification for WAAS (Wide Area
Augmentation Service) and EGNOS (European Geostationary Navigation Overlay System)
services.
The ST20-GP1 has been designed to minimize system costs and reduce the complexity of GPS
systems. It offers all hardware DSP and microprocessor functions on one chip. Whilst the entire
analogue section, RF and clock generation are available on a companion chip. Thus, with the
addition of a ROM and a RAM chip, a complete GPS system is possible using just four chips, see
Figure 1.1.
Figure 1.1 GPS system
The ST20-GP1 supports large values of frequency offset, allowing the use of a very low cost
oscillator, thus saving the cost of a Temperature Controlled Crystal Oscillator (TCXO).
The CPU and software have access to the part-processed signal to enable accelerated acquisition
time.
The ST20-GP1 can implement the GPS digital signal processing algorithms using less than 50% of
the available CPU processing power. This leaves the rest available for integrating OEM application
functions such as route-finding, map display and telemetry. A hardware microkernel in the ST20
UART
DSP
ASIC
Radio
Antenna
CPU
Real
time
clock
Watchdog
timer
RAM
ROM
Low
cost
crystal
ST20-GP1
Parallel I/O
Single chip
No TCXO
Driver
(optional)
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