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參數(shù)資料
| 型號： | ST20GP1 |
| 英文描述： | MAX 7000 CPLD 256 MC 208-PQFP |
| 中文描述： | GPS處理器 |
| 文件頁數(shù)： | 33/116頁 |
| 文件大?。?/td> | 1107K |
| 代理商： | ST20GP1 |
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ST20-GP1
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The interrupt controller receives external interrupt requests and makes an interrupt request to the
CPU when it has a pending interrupt request of higher priority than the currently executing interrupt
handler.
The
Pending
register is mapped onto two additional addresses so that bits can be set or cleared
individually.
Set_Pending
(address ‘interrupt base address + #84’) allows bits to be set individually. Writing a
‘1’ in this register sets the corresponding bit in the
Pending
register, a ‘0’ leaves the bit unchanged.
Clear_Pending
(address ‘interrupt base address + #88’) allows bits to be cleared individually.
Writing a ‘1’ in this register resets the corresponding bit in the
Pending
register, a ‘0’ leaves the bit
unchanged.
Note, if the CPU wants to write or clear some bits of the
Pending
register, the interrupts should be
masked (by writing or clearing the
Mask
register) before writing or clearing the
Pending
register.
The interrupts can then be unmasked.
Exec register
The
Exec
register keeps track of the currently executing and pre-empted interrupts. A bit is set
when the CPU starts running code for that interrupt. The highest priority interrupt bit is reset once
the interrupt handler executes a return from interrupt (iret).
The
Exec
register is mapped onto two additional addresses so that bits can be set or cleared
individually.
Set_Exec
(address ‘interrupt base address + #104’) allows bits to be set individually. Writing a ‘1’
in this register sets the corresponding bit in the
Exec
register, a ‘0’ leaves the bit unchanged.
Clear_Exec
(address ‘interrupt base address + #108’) allows bits to be cleared individually. Writing
a ‘1’ in this register resets the corresponding bit in the
Exec
register, a ‘0’ leaves the bit unchanged.
Pending
Interrupt controller base address + #80
Read/Write
Bit
Bit field
Function
0
PendingInt0
Interrupt 0 pending bit.
1
PendingInt1
Interrupt 1 pending bit.
2
PendingInt2
Interrupt 2 pending bit.
3
PendingInt3
Interrupt 3 pending bit.
4
PendingInt4
Interrupt 4 pending bit.
Table 5.4
Pending
register format
Exec
Interrupt controller base address + #100
Read/Write
Bit
Bit field
Function
0
Interrupt0Exec
Set to 1 when the CPU starts running code for interrupt 0.
1
Interrupt1Exec
Set to 1 when the CPU starts running code for interrupt 1.
2
Interrupt2Exec
Set to 1 when the CPU starts running code for interrupt 2.
3
Interrupt3Exec
Set to 1 when the CPU starts running code for interrupt 3.
4
Interrupt4Exec
Set to 1 when the CPU starts running code for interrupt 4.
Table 5.5
Exec
register format
相關PDF資料 |
PDF描述 |
|---|---|
| ST20GP6 | MAX 7000 CPLD 256 MC 208-RQFP |
| ST25C02AB1 | IC FLEX 6000 FPGA 16K 144-TQFP |
| ST25C02AB6 | Stratix FPGA 25K FBGA-672 |
| ST25C02AM1 | IC ACEX 1K FPGA 100K 208-PQFP |
| ST25C02AM6 | Cyclone II FPGA 20K FBGA-256 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ST20-GP1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GPS PROCESSOR |
| ST20GP1X33S | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GPS PROCESSOR |
| ST20GP6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GPS PROCESSOR |
| ST20-GP6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GPS PROCESSOR |
| ST20GP6CT33S | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GPS PROCESSOR |
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