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參數(shù)資料
| 型號： | OR3TP12-6BA352 |
| 英文描述： | Quad 2.3V 10 MHz OP, I temp, -40C to +85C, 14-PDIP, TUBE |
| 中文描述： | 用戶可編程ASIC的特殊功能 |
| 文件頁數(shù)： | 120/128頁 |
| 文件大?。?/td> | 2450K |
| 代理商： | OR3TP12-6BA352 |
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ORCAOR3TP12 FPSC
Embedded Master/Target PCI Interface
Data Sheet
March 2000
120
L Lucent Technologies Inc.
Package Thermal Characteristics
Table 45. ORCAOR3TP12 Plastic Package Thermal Guidelines
1. Mounted on a 4-layer JEDEC standard test board with two power/ground planes.
2. With thermal balls connected to board ground plane.
3. The value of y
JC
for all packages is <1 °C/W.
Package Coplanarity
The coplanarity limits of the ORCA Series 3/3+ packages are as follows:
I
PBGA: 8.0 mils
I
SQFP2: 3.15 mils
Package Parasitics
The electrical performance of an IC package, such as signal quality and noise sensitivity, is directly affected by the
package parasitics. Table 46 lists eight parasitics associated with the ORCA packages. These parasitics represent
the contributions of all components of a package, which include the bond wires, all internal package routing, and
the external leads.
Four inductances in nH are listed: L
SW
and L
SL,
the self-inductance of the lead; and L
MW
and L
ML
, the mutual
inductance to the nearest neighbor lead. These parameters are important in determining ground bounce noise and
inductive crosstalk noise. Three capacitances in pF are listed: C
M
, the mutual capacitance of the lead to the near-
est neighbor lead; and C
1
and C
2
, the total capacitance of the lead to all other leads (all other leads are assumed to
be grounded). These parameters are important in determining capacitive crosstalk and the capacitive loading effect
of the lead. Resistance values are in MW.
The parasitic values in Table 46 are for the circuit model of bond wire and package lead parasitics. If the mutual
capacitance value is not used in the designer’s model, then the value listed as mutual capacitance should be added
to each of the C
1
and C
2
capacitors.
Package
1
Θ
JA
(
°
C/W)
T
A
= 70
°
C Max
T
J
= 125
°
C Max
0 fpm (W)
4.2
2.4
2.9
0 fpm
200 fpm
500 fpm
240-Pin SQFP2
2
256-Pin PBGA
2, 3
352-Pin PBGA
2, 3
13.0
22.5
19.0
10.0
19.0
16.0
9.0
17.5
15.0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OR3TP12-6BA352I | Quad 2.3V 10 MHz OP, I temp, -40C to +85C, 14-TSSOP, TUBE |
| OR3TP12-6PS240 | Single 2.3V 10 MHZ OP, -40C to +125C, 14-SOIC 150mil, T/R |
| OR3TP12-6PS240I | Quad 2.3V 10 MHz OP, I temp, -40C to +85C, 14-SOIC 150mil, T/R |
| OR3TP12 | Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface |
| OR62 | OR62 is a 6-input OR gate with 2x drive strength |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OR3TP126BA352-DB | 功能描述:FPGA - 現(xiàn)場可編程門陣列 2016 LUT 187 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| OR3TP12-6BA352I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:User Programmable Special Function ASIC |
| OR3TP126BAN256-DB | 制造商:Lattice Semiconductor Corporation 功能描述: |
| OR3TP12-6PS240 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:User Programmable Special Function ASIC |
| OR3TP12-6PS240I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:User Programmable Special Function ASIC |
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