參數(shù)資料
型號: 83C795
廠商: SMSC Corporation
英文描述: Ethernet System Controller
中文描述: 以太網(wǎng)系統(tǒng)控制器
文件頁數(shù): 61/136頁
文件大?。?/td> 1996K
代理商: 83C795
is programmable on any 8K boundary from C0000H
to EE000H. Where ROM and RAM decoding
overlaps, ROM takes precedence. Figure 6-2
shows how the overlapping address structure
works.
You can relocate RAM and ROM base addresses
in tandem above 1M (100000H) with the application
of an external cascaded address decoder. This is
illustrated in Figure 6-3.
Note
Relocation of the memory windows in
this way is not supported when Plug
and Play is enabled.
6.3.1
ROMs and buffer memories larger than their
programmed windows can be scrolled (paged) by
using programmable address modifiers (adders)
that lie between the host address and the ROM or
Memory Address Generation
buffer memory. These address modifiers can add
independently to either address any of the following
values and expose different parts of the targeted
memory within the window:
0000H
2000H
4000H
6000H
8000H
A000H
C000H
E000H
The lower address lines (SA12-0) from the host are
multiplexed with the DMA address lines to generate
part of the memory address. Two potential memory
addresses are generated by subtracting the
respective RAM and ROM base address bits
(17-13) from SA17-S A13, then adding the
RP15-RP13 field of the CR Register for the RAM
FIGURE 6-3. EXTERNAL CASCADED ADDRESS DECODER
83C795
HOST INTERFACE SECTION
48
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