參數(shù)資料
型號(hào)： 28F640C3
廠商： Intel Corp.
英文描述： 3 Volt Advanced Boot Block Flash Memory(3 V 高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器)
中文描述： 3伏高級(jí)啟動(dòng)塊閃存（3伏高級(jí)快速引導(dǎo)塊閃速存儲(chǔ)器）
文件頁(yè)數(shù)： 25/70頁(yè)
文件大小： 894K
代理商： 28F640C3
28F800C3, 28F160C3, 28F320C3, 28F640C3
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19
3.4.2
Programming the Protection Register
The protection register bits are programmed using the two-cycle Protection Program command.
The 64-bit number is programmed 16 bits at a time for word-wide parts and eight bits at a time for
byte-wide parts. First write the Protection Program Setup command, C0H. The next write to the
device will latch in address and data and program the specified location. The allowable addresses
are shown in
Appendix G
. See
Figure 16, “Protection Register Programming Flowchart” on
page 49
. Attempts to address Protection Program commands outside the defined protection register
address space should not be attempted. This space is reserved for future use. Attempting to
program to a previously locked protection register segment will result in a status register error
(program error bit SR.4 and lock error bit SR.1 will be set to 1).
3.4.3
Locking the Protection Register
The user-programmable segment of the protection register is lockable by programming Bit 1 of the
PR-LOCK location to 0. Bit 0 of this location is programmed to 0 at the Intel factory to protect the
unique device number. This bit is set using the Protection Program command to program “FFFD”
to the PR-LOCK location. After these bits have been programmed, no further changes can be made
to the values stored in the protection register. Protection Program commands to a locked section
will result in a status register error (program error bit SR.4 and Lock Error bit SR.1 will be set to
1). Protection register lockout state is not reversible.
0645_05
3.5
V
PP
Program and Erase Voltages
Intel 3 Volt Advanced+ Boot Block products provide in-system programming and erase in the
1.65 V–3.6 V range. For fast production programming, it also includes a low-cost, backward-
compatible 12 V programming feature.
3.5.1
Improved 12 Volt Production Programming
When V
PP
is between 1.65 V and 3.6 V, all program and erase current is drawn through the V
CC
pin. Note that if V
PP
is driven by a logic signal, V
IH
min = 1.65 V. That is, V
PP
must remain above
1.65 V to perform in-system flash modifications. When V
PP
is connected to a 12 V power supply,
the device draws program and erase current directly from the V
PP
pin. This eliminates the need for
an external switching transistor to control the voltage V
PP
.
Figure 5 on page 20
shows examples of
how the flash power supplies can be configured for various usage models.
Figure 4. Protection Register Memory Map
4 Words
Factory Programmed
4 Words
User Programmed
PR Lock
88H
85H
84H
81H
80H
相關(guān)PDF資料
PDF描述
28F640J3C-120 Intel StrataFlash Memory (J3)
28LV64A 64K (8K x 8) Low Voltage CMOS EEPROM(低壓,64K位, CMOS 并行EEPROM)
28M0U 60V 300mA MONOLITHIC DIODE ARRAY
28M0DC 60V 300mA MONOLITHIC DIODE ARRAY
28M0DS 60V 300mA MONOLITHIC DIODE ARRAY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F640C3BC80 制造商: 功能描述: 制造商:undefined 功能描述:
28F640J3C120 制造商: 功能描述: 制造商:undefined 功能描述:
28F640J3C-120 制造商: 功能描述: 制造商:undefined 功能描述:
28F640J3D75 制造商:Intel 功能描述: 制造商: 功能描述: 制造商:undefined 功能描述:
28F640J5 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory
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