
i
SCC/ESCC U
SER
’
S
M
ANUAL
Chapter 1. General Description
1.1
1.2
1.3
1.4
Introduction .................................................................................................................................... 1-1
SCC’s Capabilities ......................................................................................................................... 1-2
Block Diagram ............................................................................................................................... 1-4
Pin Descriptions ............................................................................................................................. 1-5
1.4.1
Pins Common to both Z85X30 and Z80X30 .................................................................... 1-7
1.4.2
Pin Descriptions, (Z85X30 Only) ...................................................................................... 1-8
1.4.3
Pin Descriptions, (Z80X30 Only) ...................................................................................... 1-9
Chapter 2. Interfacing the SCC/ESCC
2.1
Introduction .................................................................................................................................... 2-1
2.2
Z80X30 Interface Timing ................................................................................................................ 2-1
2.2.1
Z80X30 Read Cycle Timing ............................................................................................. 2-2
2.2.2
Z80X30 Write Cycle Timing .............................................................................................. 2-3
2.2.3
Z80X30 Interrupt Acknowledge Cycle Timing .................................................................. 2-4
2.2.4
Z80X30 Register Access .................................................................................................. 2-5
2.2.5
Z80C30 Register Enhancement ....................................................................................... 2-8
2.2.6
Z80230 Register Enhancements ...................................................................................... 2-8
2.2.7
Z80X30 Reset .................................................................................................................. 2-9
2.3
Z85X30 Interface Timing ............................................................................................................. 2-10
2.3.1
Z85X30 Read Cycle Timing ........................................................................................... 2-10
2.3.2
Z85X30 Write Cycle Timing ............................................................................................ 2-11
2.3.3
Z85X30 Interrupt Acknowledge Cycle Timing ................................................................ 2-11
2.3.4
Z85X30 Register Access ................................................................................................ 2-12
2.3.5
Z85C30 Register Enhancement ..................................................................................... 2-14
2.3.6
Z85C30/Z85230 Register Enhancements ...................................................................... 2-14
2.3.7
Z85X30 Reset ................................................................................................................ 2-15
2.4
Interface Programming ................................................................................................................ 2-15
2.4.1
I/O Programming Introduction ........................................................................................ 2-15
2.4.2
Polling ............................................................................................................................ 2-16
2.4.3
Interrupts ........................................................................................................................ 2-16
2.4.4
Interrupt Control ............................................................................................................. 2-17
2.4.5
Daisy-Chain Resolution .................................................................................................. 2-19
2.4.6
Interrupt Acknowledge ................................................................................................... 2-21
2.4.7
The Receiver Interrupt ................................................................................................... 2-21
2.4.8
Transmit Interrupts and Transmit Buffer Empty Bit ........................................................ 2-25
2.4.9
External/Status Interrupts ............................................................................................... 2-31
2.5
Block/DMA Transfer ..................................................................................................................... 2-33
2.5.1
Block Transfers .............................................................................................................. 2-33
2.5.2
DMA Requests ............................................................................................................... 2-36
2.6
Test Functions ............................................................................................................................. 2-41
2.6.1
Local Loopback .............................................................................................................. 2-41
2.6.2
Auto Echo ....................................................................................................................... 2-41
T
ABLE
OF
C
ONTENTS
UM010901-0601