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參數(shù)資料
| 型號： | SYM53C825AE |
| 廠商： | LSI Corporation |
| 英文描述： | PCI-SCSI I/O Processor(PCI-SCSI I/O接口處理器) |
| 中文描述： | 的PCI -的SCSI I / O處理器（個PCI -的SCSI的I / O接口處理器） |
| 文件頁數(shù)： | 22/225頁 |
| 文件大?。?/td> | 1237K |
| 代理商： | SYM53C825AE |
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2-2
SYM53C825A/825AE Data Manual
Functional Description
SDMS: The Total SCSI Solution
information from the internal RAM, these fetches
remain internal to the chip and do not use the PCI
bus. Other types of access to the RAM by the
SYM53C825A use the PCI bus, as if they were
external accesses. T he MAD5 pin enables the 4K
internal RAM. To disable the internal RAM, con-
nect a 4.7K
resistor between the MAD5 pin and
V
SS
.
T he RAM can be relocated by the PCI system
BIOS anywhere in 32-bit address space. T he RAM
Base Address register in PCI configuration space
contains the base address of the internal RAM.
T his register is similar to the ROM Base Address
register in PCI configuration space. To simplify
loading of SCRIPT S instructions, the base address
of the RAM will appear in the SCRAT CHB regis-
ter when bit 3 of the CT EST 2 register is set. T he
RAM is byte-accessible from the PCI bus and will
be visible to any bus-mastering device on the bus.
External accesses to the RAM (i.e., by the CPU)
follow the same timing sequence as a standard
slave register access, except that the target wait
states required will drop from 5 to 3.
A complete set of development tools is available for
writing custom drivers with SCSI SCRIPT S. For
more information on the SCSI SCRIPT S instruc-
tions supported by the SYM53C825A, see Chap-
ter 6, “Instruction Set of the I/O Processor.”
SDMS: T he Total SCSI
Solution
For users who do not need to develop custom driv-
ers, Symbios provides a total SCSI solution in PC
environments with the SCSI Device Management
System (SDMS). SDMS provides BIOS driver
support for hard disk, tape, and removable media
peripherals for the major PC-based operating sys-
tems.
SDMS includes a SCSI BIOS to manage all SCSI
functions related to the device. It also provides a
series of SCSI device drivers that support most
major operating systems. SDMS supports a multi-
threaded I/O application programming interface
(API) for user-developed SCSI applications.
SDMS supports both the ASPI and CAM SCSI
software specifications.
Prefetching SCRIPT S
Instructions
When enabled (by setting the Prefetch Enable bit
in the DCNT L register), the prefetch logic in the
SYM53C825A fetches 8 dwords of instructions.
T he prefetch logic automatically determines the
maximum burst size that it can perform, based on
the burst length as determined by the values in the
DMODE register. If the unit cannot perform
bursts of at least four dwords, it will disable itself.
While the SYM53C825A is prefetching SCRIPT S
instructions, the PCI Cache Line Size register
value does not have any effect and the Read Line,
Read Multiple, and Write and Invalidate com-
mands will not be used.
T he SYM53C825A may flush the contents of the
prefetch unit under certain conditions, listed
below, to ensure that the chip always operates from
the most current version of the software. When one
of these conditions apply, the contents of the
prefetch unit are flushed automatically.
1. On every Memory Move instruction. T he
Memory Move instruction is often used to
place modified code directly into memory. To
make sure that the chip executes all recent
modifications, the prefetch unit flushes its
contents and loads the modified code every
time a instruction is issued. To avoid
inadvertently flushing the prefetch unit
contents, use the No Flush option for all
Memory Move operations that do not modify
code within the next 8 dwords. For more
information on this instruction, refer to
Chapter 6 in the section on Memory Move
Instructions.
2. On every Store instruction. T he Store
instruction may also be used to place modified
code directly into memory. To avoid
inadvertently flushing the prefetch unit
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