參數(shù)資料
型號(hào): SMJ55161
廠商: Texas Instruments, Inc.
英文描述: 262144 BY 16-BIT MULTIPORT VIDEO RAM
中文描述: 262144由16位多端口視頻內(nèi)存
文件頁(yè)數(shù): 15/64頁(yè)
文件大?。?/td> 1505K
代理商: SMJ55161
SMJ55161
262144 BY 16-BIT
MULTIPORT VIDEO RAM
SGMS056D – MAY 1995 – REVISED OCTOBER 1997
15
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
byte operation
Byte operation can be applied in DRAM-read cycles, write cycles, block-write cycles, load-write-mask-register
cycles, and load-color-register cycles. In byte operation, the column address (A0–A8) is latched at the first
falling edge of CASx. In read cycles, CASL enables the lower byte (DQ0–DQ7) and CASU enables the upper
byte (DQ8–DQ15) (see Figure 4).
Row
th(CLCA)
RAS
tsu(CA)
Column
Lower Byte Output
Upper Byte
Output
ta(C)
CASL
CASU
A0–A8
DQ0–DQ7
DQ8–DQ15
TRG
ta(G)
ta(C)
Figure 4. Example of a Byte-Read Cycle
相關(guān)PDF資料
PDF描述
SMJ55166 262144 BY 16-BIT MULTIPORT VIDEO RAM
SMJ626162 524288 BY 16-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY
SML-010DT Chip LEDs with reflectors
SML-010FT Chip LEDs with reflectors
SML-010JT Chip LEDs with reflectors
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