參數(shù)資料
型號(hào)： sda 9206
廠商： SIEMENS AG
英文描述： ADC with Built in Antialiasing Filter and Clock Generation Unit(帶有片內(nèi)去混疊和時(shí)鐘發(fā)生器的A/D轉(zhuǎn)換器)
中文描述： 在抗混疊濾波器和時(shí)鐘產(chǎn)生單元內(nèi)置模數(shù)轉(zhuǎn)換器（帶有片內(nèi)去混疊和時(shí)鐘發(fā)生器的的A / D轉(zhuǎn)換器）
文件頁數(shù)： 38/54頁
文件大?。?/td> 530K
代理商： SDA 9206
SDA 9206
Semiconductor Group
38
1999-02-10
Subaddress 0D
H
Bit
D7...D0
Subaddress 0E
H
Bit
D7...D0
Name
H2OF
Function
H2 stop time in relation to reference time:
(H2 is always used as clamping reference for the YUV ADCs)
(refer to the following table and to timing diagram)
H2OF7...H2OF0
0100 0000
...
0111 1111
1000 0000
1000 0001
...
1111 1111
0000 0000
0000 0001
...
0011 1111
Number
- (- 192)
...
- (- 129)
- (- 128)
- (- 127)
...
- (- 1)
- (0)
- (+ 1)
...
- (+ 63)
13.5 MHz Cycles
= 192
...
= 129
= 128
= 127
...
= 1
= 0
= - 1
...
= - 63
Time (2FH = 0)
14.21
μ
s
...
9.55
μ
s
9.47
μ
s
9.40
μ
s
...
0.07
μ
s
0
μ
s
- 0.07
μ
s
...
- 4.67
μ
s
Name
HSON
Function
HS start time in relation to reference time:
(refer to the following table and to timing diagram)
HSON7...HSON0
1010 0000
...
1111 1111
0000 0000
0000 0001
...
0111 0110
0111 0111
Number
- (- 96) x 4
...
- (- 1) x 4
- (0) x 4
- (+ 1) x 4
...
- (+ 118) x 4
- (+ 119) x 4
13.5 MHz Cycles
= 384
...
= 4
= 0
= - 4
...
= - 472
= - 476
Time (2FH = 0)
28.42
μ
s
...
0.30
μ
s
0
μ
s
- 0.30
μ
s
...
- 34.93
μ
s
- 35.22
μ
s
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