- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385836 > sda 9206 (SIEMENS AG) ADC with Built in Antialiasing Filter and Clock Generation Unit(帶有片內(nèi)去混疊和時(shí)鐘發(fā)生器的A/D轉(zhuǎn)換器) PDF資料下載
參數(shù)資料
| 型號(hào)： | sda 9206 |
| 廠商： | SIEMENS AG |
| 英文描述： | ADC with Built in Antialiasing Filter and Clock Generation Unit(帶有片內(nèi)去混疊和時(shí)鐘發(fā)生器的A/D轉(zhuǎn)換器) |
| 中文描述： | 在抗混疊濾波器和時(shí)鐘產(chǎn)生單元內(nèi)置模數(shù)轉(zhuǎn)換器（帶有片內(nèi)去混疊和時(shí)鐘發(fā)生器的的A / D轉(zhuǎn)換器） |
| 文件頁(yè)數(shù)： | 22/54頁(yè) |
| 文件大?。?/td> | 530K |
| 代理商： | SDA 9206 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)當(dāng)前第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)
SDA 9206
Semiconductor Group
22
1999-02-10
to adapt the nominal frequency of the DTO by means of 5
I
2
C-Bus bits (INC4...INC0)
such shifting the center frequency according to the momentary standard used.
For the different applications the following values of INC are allowed (values valid for
a crystal frequency of 24.576 MHz):
Note:
A change of INC causes spontaneous changes of the generated clock
frequencies!
The DTO generates a saw-tooth with a frequency that is proportional to the increment.
The saw-tooth is converted into a sinusoidal clock signal by means of a D/A converter
and applied to an analog PLL which multiplies the frequency and minimizes residual
jitter.
By means of the
I
2
C bits S1CL and S2CL the output frequency on pins CLK1 and CLK2
can be set. In this manner a clock is provided that is line-locked with the SYNC-input
signal. The ratio of these clock frequencies to the horizontal frequency of SYNC depends
only on the
I
2
C-Bus bits S1CL, S2CL, HPLL and 2FH.
For the different modes the following values of S1CL and S2CL are allowed:
The digital horizontal PLL supplies a noise-suppressed horizontal pulse.
Application
PAL
NTSC
PAL (100 Hz/VGA)
NTSC (120 Hz/VGA) 31500
ATV
MUSE
Macintosh
VGA
FH [Hz]
15625
15750
31250
2FH
0
0
1
1
1
1
1
1
YUV-ADCs
active
active
inactive
inactive
inactive
inactive
inactive
inactive
INC
6
6
6
6
8
11
14
21
32400
33750
35000
38000
Mode
YUV-ADC
2FH
S1CL
S2CL
f
CLK1
(MHz)
27
27
27
13.5
6.25 ... 8.75 25 ... 35
12.5 ... 17.5 25 ... 35
f
CLK2
(MHz)
27
tristate
27
tristate
CCIR
CCIR
4:2:2, 4:1:1 enabled
4:2:2, 4:1:1 enabled
VGA
VGA
enabled
enabled
0
0
0
0
1
1
11
11
11
10
01
10
11
00
11
00
11
11
disabled
disabled
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| sda 9254-2 | 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter(應(yīng)用于TV的2.6 M位動(dòng)態(tài)存儲(chǔ)器) |
| sda 9290-6 | Picture Processor(圖象處理器) |
| sda 9389x | Single-Chip Picture in Picture IC(單芯片畫(huà)中畫(huà)IC) |
| sda 9488x | Single-Chip Picture in Picture IC(單芯片畫(huà)中畫(huà)IC) |
| sda 9489x | Single-Chip Picture in Picture IC(單芯片畫(huà)中畫(huà)IC) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDA9220-5 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Memory Sync Controller III |
| SDA9251-2X | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:868352-Bit Dynamic Sequential Access Memory for Television Applications (TV-SAM) |
| SDA9253 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) |
| SDA9254-2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter |
| SDA9255 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:SRC-Scan Rate Converter SDA9255 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。