參數(shù)資料
型號： MT49H16M18C
廠商： Micron Technology, Inc.
英文描述： 288Mb SIO REDUCED LATENCY(RLDRAM II)
中文描述： 288Mb二氧化硅約化延遲（延遲DRAM二）
文件頁數(shù)： 34/44頁
文件大?。?/td> 1117K
代理商： MT49H16M18C
16 MEG x 18, 32 MEG x 9
2.5V V
EXT
, 1.8V V
DD
, HSTL, SIO, RLDRAM II
pdf: 09005aef80a41b59/zip: 09005aef811ba111
MT49H8M18C_2.fm - Rev. F 11/04 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2004 Micron Technology, Inc. All rights reserved.
34
Figure 36: WRITE Burst Basic Sequence: BL = 4, with Multiplexed Addresses,
Configuration 1, WL = 6
Figure 37: READ Burst Basic Sequence: BL = 4, with Multiplexed Addresses,
Configuration 1, RL = 5
NOTE:
A
x
/BA
k
: Address A
x
of bank
k
A
y
: Address A
y
of bank
k
WR: WRITE
Djk: Data
k
to bank
j
WL: WRITE latency
Qjk: Data
k
to bank
j
RD: READ
RL: READ Latency
CK#
CK
CMD
0
1
2
3
4
5
6
7
8
ADDR
WL = 6
D
D0a
D0c
D0b
D0d
D1a
D1
WR
Ax
Ay
Ax
Ay
Ax
Ay
Ax
Ay
Ax
NOP
WR
NOP
WR
NOP
WR
NOP
WR
DKx#
DKx
UNDEFINED
CK#
CK
CMD
0
1
2
3
4
5
6
7
8
ADDR
RL = 5
Q
QKx
QKx#
Q0a
Q0c
Q0b
Q0d Q1a Q1b
Q1c
RD
NOP
RD
NOP
RD
NOP
RD
NOP
RD
DON’T CARE
Ax
Ay
Ax
Ay
Ax
Ay
Ax
Ay
Ax
QVLD
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