____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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In E1 operation, CRC-4 errors are counted and reported in the
PCVCR registers.. Since the maximum CRC-4
count in a one second period is 1000, this counter cannot saturate in that length of time. The counter stops
counting during loss of frame at either the FAS or CRC-4 level, but it continues to count if only CAS multiframe
sync is lost.
Table 10-52. T1 Path Code Violation Counting Options
FRAMING MODE
COUNT Fs ERRORS?
WHAT IS COUNTED IN THE PCVCR REGISTERS SF
no
errors in the Ft pattern
SF
yes
errors in both the Ft and Fs patterns
ESF
don’t care
errors in the CRC-6 codewords
10.11.8.3 Frames Out Of Sync Counter and Count Registers
In T1 mode, when
ERCNT.MOSCR=1 the number of multiframes that the framer’s synchronizer is out of sync is
counted and reported in the
FOSCR registers. This number is useful in ESF applications where there is a need to
measure the parameters loss of frame count (LOFC) and ESF Error Events as described in AT&T publication TR
54016. When the counter is operated in this mode, it does not stop counting during loss of frame (conditions
(
RRTS1.RLOF=1). When
ERCNT.MOSCR=0, the counter has an alternate operating mode in which it counts either
errors in the Ft framing pattern (in T1 SF mode) or errors in the FPS framing pattern (in T1 ESF mode). When the
FOSCR is operated in this mode, it stops counting during loss of frame conditions
(RRTS1.RLOF=1).
Table 10-53summarizes which errors are counted in each T1 mode of operation.
In E1 mode, word errors in the Frame Alignment Signal (FAS) in timeslot 0 are counted. The counter stops
counting during loss of frame conditions (
RRTS1.RLOF=1). FAS errors are not counted when the framer is
searching for FAS alignment and/or CAS or CRC-4 multiframe alignment. Since the maximum FAS word error
count in a one second period is 4000, this counter cannot saturate.
Table 10-53. T1 Frames Out Of Sync Counting Options
FRAMING MODE
COUNT MOS OR F–BIT
WHAT IS COUNTED IN THE FOSCR REGISTERS D4
MOS
number of multiframes out of sync
D4
F–Bit
errors in the Ft pattern
ESF
MOS
number of multiframes out of sync
ESF
F–Bit
errors in the FPS pattern
10.11.8.4 E–Bit Counter and Count Registers
This counter is only available in E1 mode. Far End Block Errors (FEBE) are counted and reported in the
EBCRregisters. These errors are indicated by the far-end system in the E bits, i.e. the first bit of frames 13 and the first bit
of frame 15 in the E1 CRC-4 multiframe. See
Table 10-37. The counter increments once for each E-bit that is set to
0. Since the maximum E–bit count in a one second period is 1000, this counter cannot saturate. The counter stops
counting during loss of frame at either the FAS or CRC-4 level, but it continues to count if only CAS multiframe
sync is lost.
10.11.9 DS0 Monitoring Function
The transmit formatter can monitor one DS0 (64kbps) channel in the transmit direction, and the Rx framer can
separately monitor one DS0 channel in the Rx direction at the same time. The registers related to the control of
DS0 monitoring are shown in the following table.
Table 10-54. Registers Related to DS0 Monitoring
Register Name
Description
Functions
Page
Transmit DS0 Monitor Select Register
Tx channel to be monitored