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10.11.5.3 Sa Bit Monitoring and Reporting
In addition to the registers outlined above, the framer provides status and interrupt capability in order to detect
changes in the state of selected Sa bits. The
RSAIMR register can be used to select which Sa bits are monitored
for a change of state. When a change of state is detected in one of the enabled Sa bit positions, the
2
E1.SaXCD status bit is set. If multiple Sa bits have been enabled, the user can read the
SaBITS register to
determine the current value of each Sa bit.
For the Sa6 bits, additional support is available to detect specific codewords per ETSI ETS 300 233. The
Sa6CODE register reports the received Sa6 codeword. The codeword must be stable for a period of 3 sub-
multiframes and different from the previous stored value in order to be stored in the
Sa6CODE register. Latched
status bit
2
10.11.6 Maintenance and Alarms
The receive framer and transmit formatter provides extensive functions for alarm detection and generation,
performance monitoring, and transmission of diagnostic information, including:
Real-time status bits, latched status bits and interrupt mask bits
LOS detection
RAI detection and generation
AIS detection and generation
Pulse density violation detection
Error counters
DS0 monitoring
Milliwatt code generation and detection
Rx and Tx Slip buffer status
Some of the registers related to maintenance and alarms are as follows:
Table 10-46. Registers Related to Maintenance and Alarms
Register Name
Description
Functions
Page
Rx Real-Time Status Register 1
Rx real-time RAI, AIS, LOS, LOF
Rx Real-Time Status Register 3 (T1 Mode)
Rx up/down/spare code detect
Rx Real-Time Status Register 3 (E1 Mode)
Rx V5.2 link, remote MF alarm
Rx Latched Status Register 1
Rx latched RAI, AIS, LOF, LOF set/clr
Rx Latched Status Register 2 (T1 Mode)
Rx pulse density, COFA, F-bit error etc
Rx Latched Status Register 2 (E1 Mode)
Rx FAS/CAS/CRC-4 out of sync
Rx Latched Status Register 3 (T1 Mode)
Rx code detect, loss of Rx clock
Rx Latched Status Register 3 (E1 Mode)
Rx V5.2 link, remote MF alarm
Rx Latched Status Register 4
Rx signaling change, 1-sec timer, etc.
Rx Latched Status Register 7 (T1 Mode)
Rx RAI-CI, AIS-CI, etc.
Rx Latched Status Register 7 (E1 Mode)
Rx Sa6 code, Sa-bit change
Rx Interrupt Mask Register 1
interrupt mask bits for
RLS1Rx Interrupt Mask Register 3 (T1 Mode)
Rx Interrupt Mask Register 3 (E1 Mode)
Rx Interrupt Mask Register 4
interrupt mask bits for
RLS4Rx Interrupt Mask Register 7 (T1 Mode)
Rx Interrupt Mask Register 7 (E1 Mode)
Rx Error Count Configuration Register
Configuration of the Error Counters
Rx Line Code Violation Count Registers
16-bit Rx line code violation counter
Rx Path Code Violation Count Registers
16-bit Rx path code violation counter
Rx Frames Out-of-Sync Count Registers
16-bit frame out-of-sync counter
Rx E-Bit Count Registers
16-bit E-bit count register
Tx Latched Status Register 1
loss of Tx clock, Tx pulse density
Tx Latched Status Register 3
loss of frame alignment
Tx Interrupt Mask Register 1
interrupt mask bits for
TLS1Tx Interrupt Mask Register 3
interrupt mask bits for
TLS3