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參數(shù)資料
| 型號： | CD1865 |
| 廠商： | Intel Corp. |
| 英文描述： | Intelligent Eight-Channel Communications Controller |
| 中文描述： | 智能八通道通信控制器 |
| 文件頁數(shù)： | 76/150頁 |
| 文件大?。?/td> | 871K |
| 代理商： | CD1865 |
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CD1865
—
Intelligent Eight-Channel Communications Controller
76
Datasheet
7.3.5
Transmitter Hardware (Out-of-Band) Flow Control
Transmit Out-of-Band Flow Control is performed automatically by the CD1865 by the CTS* pin,
if the CTS Auto Enable (CtsAE) mode is enabled in bit 1 of COR2. In this mode, before a character
from the FIFO is transmitted, the CTS* pin is tested, and, if inactive, transmission is delayed. Since
flow control is implemented between the FIFO and the Transmit Holding register, when CTS* is
negated, it is possible to get both the current character being sent and the character in the Transmit
Holding register.
However, the Send Special Character Command (that is, Xon and Xoff) overrides CTS* inactive.
This is generally preferred; however, in some applications sample CTS* or CD* before sending a
special character.
To complete the handshake with a remote device, an RTS Automatic Output (RtsAO, bit 2) mode is
also provided. This causes the RTS pin to be asserted throughout any data transmission: normal,
break, and special characters. The RTS pin is activated whenever there is data in the FIFO and
transmitter registers. It is held active until after the last Stop bit of the last character is transmitted.
7.3.6
Transmitter Software (In-Band) Flow Control
The CD1865 transmitter can be programmed to respond automatically to flow-control characters
received by the receiver. This feature requires no host assistance and substantially reduces host
processing requirements. If this Automatic mode is enabled, when the remote unit transmits an
Xoff character to the CD1865 (to prompt the CD1865 to suspend transmission), the CD1865
terminates the transmission. The CD1865 may require approximately 500 microseconds (~2
character-times at 38.4 kbps) after receipt of the Stop bit to recognize that the character it has
Figure 26. Transmitter Flow-Control Logic
FULL/
EMPTY
BIT
TRANSMITTER HOLDING REGISTER
TRANMSITTER SHIFT REGISTER
TRANSMITTER
FIFO
BACKGROUND CODE:
FIFO-TO-H.R. TRANSFER, FLOW
CONTROL, OTHER FEATURES
FOREGROUND CODE:
BIT DISASSEMBLY,
H.R.-TO-S.R. TRANSFER
(POLLING LOOP)
(INTERRUPT-DRIVEN)
RTS
OUT
CTS
IN
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| CD1865N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CD1865P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CD1866N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CD1866P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CD1867N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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