參數(shù)資料
型號(hào): CD1865
廠商: Intel Corp.
英文描述: Intelligent Eight-Channel Communications Controller
中文描述: 智能八通道通信控制器
文件頁數(shù): 73/150頁
文件大小: 871K
代理商: CD1865
Intelligent Eight-Channel Communications Controller
CD1865
Datasheet
73
When the CD1865 receiver is too busy, the transmitter can be used to send Xoff/Xon to the remote
device. This Receiver Software (In-Band) Flow Control is covered in
Section 7.3.3 on page 74
.
The CD1865 transmitter can be controlled by the remote device. This Transmitter Software (In-
Band) Flow Control is covered in
Section 7.3.6 on page 76
.
The current flow-control status is always available to the host. It is stored in the Channel Control
Status register (CCSR). Two bits, Receive Flow-on and Receive Flow-off, show whether the last
flow-control command sent by the CD1865 was on or off. As long as the receiver is enabled, the
CD1865 continues to receive any data sent regardless of whether it has requested the remote to shut
off.
7.3.2
Receiver Hardware (Out-of-Band) Flow Control
Out-of-Band Flow Control uses the Modem Handshake signal (DTR*) to control the flow of data.
Whenever the Receive FIFO reaches a user-defined threshold, DTR* is negated. This event can be
used to signal the remote to stop sending characters. The threshold is set by four bits in the Modem
Control Option register 1, and can be any level from one to eight, or disabled. The DTR* pin is also
negated whenever DTR* mode is set and the channel is disabled or reset. If DTR* mode is not set,
the DTR* pin is not changed by the CD1865, and remains at whatever value the host sets it to.
While it is possible to set the DTR* threshold lower than the service request threshold, the part
operates as though the DTR* threshold was the same as the service request threshold. If the DTR*
threshold is set lower, it is ignored, and DTR* negates when the service request threshold is
reached. If required, set the DTR* threshold to a
1
, and then it
tracks
the other threshold
automatically.
Figure 25. Receiver Flow-Control Logic
RECEIVER SHIFT REGISTER
RECEIVER HOLDING REGISTER
FULL/
EMPTY
BIT
RECEIVER FIFO, STATUS FIFO
BACKGROUND CODE:
H.R.-TO-FIFO TRANSFER, OTHER
FEATURES. FLOW CONTROL:
FOREGROUND CODE:
BIT ASSEMBLY,
S.R.-TO-H.R. TRANSFER
(INTERRUPT-DRIVEN)
(POLLING LOOP)
DTR
OUT
DSR
IN
MATCH SPECIAL CHARACTER
DSR* ASSERTED
DTR* THRESHOLD REACHED
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