
PCI Functional Description
Configuration Registers
SYM53C810A Data Manual
3-11
Register 0Eh
Header Type
Read Only
T his register identifies the layout of bytes 10h
through 3Fh in configuration space and also
whether or not the device contains multiple func-
tions. T he value of this register is 00h.
Register 10h
Base Address Zero (I/O)
Read/Write
T his 32-bit register has bit zero hardwired to one.
Bit 1 is reserved and must return a zero on all
reads, and the other bits are used to map the
device into I/O space.
Register 14h
Base Address One (Memory)
Read/Write
T his register has bit 0 hardwired to zero. For
detailed information on the operation of this regis-
ter, refer to the PCI Specification.
Register 3Ch
Interrupt Line
Read/Write
T his register is used to communicate interrupt line
routing information. POST software will write the
routing information into this register as it initiates
and configures the system. T he value in this regis-
ter tells which input of the system interrupt con-
troller(s) has been connected to the device’s
interrupt pin. Values in this register are specified by
system architecture.
Register 3Dh
Interrupt Pin
Read Only
T his register tells which interrupt pin the device
uses. Its value is set to 01h, for the INTA/ signal.
Register 3Eh
Min_Gnt
Read Only
Register 3Fh
Max_Lat
Read Only
T hese registers are used to specify the desired set-
tings for Latency T imer values. Min_Gnt is used to
specify how long a burst period the device needs.
Max_Lat is used to specify how often the device
needs to gain access to the PCI bus. T he value
specified in these registers is in units of 0.25
microseconds. Values of zero indicate that the
device has no major requirements for the settings
of Latency T imers. T he SYM53C810A sets the
Min_Gnt register to 11h and the Max_Lat register
to 40h.