
II CORE BLOCK: BCU (Bus Control Unit)
B-II-4-8
EPSON
S1C33T01 FUNCTION PART
Area 10
Area 10 is an external memory area that includes the boot address (0xC00000). This area supports four boot mode
and a high-speed internal ROM can also be mapped.
Area 10 boot mode
The boot mode can be configured using the external pins EA10MD[1:0].
Table 4.6
Area 10 Boot Mode Selection
EA10MD[1:0] pins
Area 10 boot mode
00
Internal ROM emulation mode
01
OTP and internal ROM emulation mode
10
Internal ROM boot mode
11
External ROM boot mode
Internal ROM boot mode
The CPU boots by the internal ROM mapped to area 10. The internal ROM size should be selected from among
eight types (min. 16KB, max. 2MB) using the A10IR[2:0] (D[E:C])/Areas 10–9 set-up register (0x48126).
This ROM begines with address 0xC00000 and can be read in one cysle the same as that of area 3. For the
remained area within area 10, the external memory will be accessed if it is available.
Internal ROM emulation mode
The CPU boots by the external memory that emulates an internal ROM. This mode accesses the ROM
emulation area set by the A10IR[2:0] (D[E:C])/Areas 10–9 set-up register (0x48126) using the same condition
as internal ROM boot mode. The emulation memory is accessed using the #CE10IN chip enable signal.
OTP and internal ROM emulation mode
In this mode, channel 0 of IDMA starts up for tranfering the program codes in the Flash memory to the high-
speed SRAM immediately after an initial reset is released. Then the system boots by the SRAM. After that, this
mode functions the same as internal ROM emulation mode.
Since the Flash memory and SRAM are mapped to the same address range, the Flash memory is accessed using
the #CE10EX chip enable signal and the SRAM is accessed using the #CE10IN chip enable signal.
External ROM boot mode
The CPU boots by the external ROM (ROM, Flash, SRAM, etc.). This mode uses the bus condition set by the
BCU registers for area 10.
Setting the internal ROM size
When a boot mode other than external ROM boot mode is used, the internal ROM or emulation memory size
should be set using A10IR[2:0] (D[E:C)/Areas 10–9 set-up register (0x48126).
Table 4.7
Area 10 Internal ROM Size
A10IR2
A10IR1
A10IR0
ROM size
0
16KB
0
1
32KB
0
1
0
64KB
0
1
128KB
1
0
256KB
1
0
1
512KB
11
0
1MB
1
2MB (default)