III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERS
S1C33T01 FUNCTION PART
EPSON
B-III-3-15
PSET0: Timer 0 preset (D1) / 8-bit timer 0 control register (0x40160)
PSET1: Timer 1 preset (D1) / 8-bit timer 1 control register (0x40164)
PSET2: Timer 2 preset (D1) / 8-bit timer 2 control register (0x40168)
PSET3: Timer 3 preset (D1) / 8-bit timer 3 control register (0x4016C)
PSET4: Timer 4 preset (D1) / 8-bit timer 4 control register (0x40174)
PSET5: Timer 5 preset (D1) / 8-bit timer 5 control register (0x40178)
Preset the reload data in the counter.
Write "1": Preset
Write "0": Invalid
Read: Always "0"
The reload data of RLDx is preset in the counter of timer x by writing "1" to PSETx. If the counter is preset when in
a RUN state, the counter starts counting immediately after the reload data is preset.
If the counter is preset when in a STOP state, the reload data that has been preset is retained.
Writing "0" results in No Operation.
Since PSETx is a write-only bit, its content when read is always "0".
PTRUN0: Timer 0 RUN/STOP control (D0) / 8-bit timer 0 control register (0x40160)
PTRUN1: Timer 1 RUN/STOP control (D0) / 8-bit timer 1 control register (0x40164)
PTRUN2: Timer 2 RUN/STOP control (D0) / 8-bit timer 2 control register (0x40168)
PTRUN3: Timer 3 RUN/STOP control (D0) / 8-bit timer 3 control register (0x4016C)
PTRUN4: Timer 4 RUN/STOP control (D0) / 8-bit timer 4 control register (0x40174)
PTRUN5: Timer 5 RUN/STOP control (D0) / 8-bit timer 5 control register (0x40178)
Controls the counter's RUN/STOP states.
Write "1": RUN
Write "0": STOP
Read: Valid
The counter of each timer starts counting down when "1" written to PTRUNx, and stops counting when "0" is
written.
While in a STOP state, the counter retains its count until it is preset with reload data or placed in a RUN state. When
the state is changed from STOP to RUN, the counter can restart counting beginning with the retained count.
At initial reset, PTRUNx is set to "0" (STOP).
PTOUT0: Timer 0 clock output control register (D2) / 8-bit timer 0 control register (0x40160)
PTOUT1: Timer 1 clock output control register (D2) / 8-bit timer 1 control register (0x40164)
PTOUT2: Timer 2 clock output control register (D2) / 8-bit timer 2 control register (0x40168)
PTOUT3: Timer 3 clock output control register (D2) / 8-bit timer 3 control register (0x4016C)
PTOUT4: Timer 4 clock output control register (D2) / 8-bit timer 4 control register (0x40174)
PTOUT5: Timer 5 clock output control register (D2) / 8-bit timer 5 control register (0x40178)
Controls the clock output of each timer.
Write "1": On
Write "0": Off
Read: Valid
The underflow signal of timer x is output from the external output pin set by CFP1x by writing "1" to PTOUTx.
When using timer 2 to 5 as the clock source of the serial interface, a clock generated from the underflow signal by
dividing it by 2 is output to the corresponding channel of the serial interface.
The clock output is turned off by writing "0" to PTOUT, and the external output is fixed at "0" and the internal clock
output is fixed at "1".
At initial reset, PTOUT is set to "0" (off).