TM Family Datasheet Page 65 of 81 June 2009 – " />
參數(shù)資料
型號(hào): PI7C9X20505GPBNDE
廠商: Pericom
文件頁(yè)數(shù): 62/81頁(yè)
文件大?。?/td> 0K
描述: IC PCIE PACKET SWITCH 256BGA
產(chǎn)品變化通告: Copper Wire Change 26/Sept/2011
標(biāo)準(zhǔn)包裝: 90
系列: GreenPacket™
應(yīng)用: 封裝開關(guān),5 端口/5 線道
接口: PCI Express
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(17x17)
包裝: 托盤
安裝類型: 表面貼裝
PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 65 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
7.2.91
VC RESOURCE CAPABILITY REGISTER (0) – OFFSET 150h
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
Port Arbitration
Capability
RO
It indicates the types of Port Arbitration supported by the VC resource. The
Switch supports Hardware fixed arbitration scheme, e.g., Round Robin,
Weight Round Robin (WRR) arbitration with 128 phases (3~4 enabled ports)
and Time-based WRR with 128 phases (3~4 enabled ports). Note that the
Time-based WRR is only valid in VC1.
Reset to 00001001b.
13:8
Reserved
RO
Reset to 000000b.
14
Advanced Packet
Switching
RO
When set, it indicates the VC resource only supports transaction optimized
for Advanced Packet Switching (AS).
Reset to 0b.
15
Reject Snoop
Transactions
RO
This bit is not applied to PCIe Switch.
Reset to 0b.
22:16
Maximum Time
Slots
RO
It indicates the maximum numbers of time slots (minus one) are allocated for
Isochronous traffic. The default value may be changed by SMBus or
auto-loading from EEPROM.
Reset to 7Fh.
23
Reserved
RO
Reset to 0b.
31:24
Port Arbitration
Table Offset
RO
It indicates the location of the Port Arbitration Table (n) as an offset from the
base address of the Virtual Channel Capability register in the unit of DQWD
(16 bytes).
Reset to 04h for Port Arbitration Table (0).
7.2.92
VC RESOURCE CONTROL REGISTER (0) – OFFSET 154h
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
TC/VC Map
RW
This field indicates the TCs that are mapped to the VC resource. Bit locations
within this field correspond to TC values. When the bits in this field are set, it
means that the corresponding TCs are mapped to the VC resource. The
default value may be changed by SMBus or auto-loading from EEPROM.
Reset to FFh.
15:8
Reserved
RO
Reset to 00h.
16
Load Port Arbitration
Table
RW
When set, the programmed Port Arbitration Table is applied to the hardware.
This bit always returns 0b when read.
Reset to 0b.
19:17
Port Arbitration
Select
RW
This field is used to configure the Port Arbitration by selecting one of the
supported Port Arbitration schemes. The permissible values for the schemes
supported by Switch are 000b and 011b at VC0, other value than these
written into this register will be treated as default.
Reset to 000b.
23:20
Reserved
RO
Reset to 0h.
26:24
VC ID
RW
This field assigns a VC ID to the VC resource.
Reset to 000b.
30:27
Reserved
RO
Reset to 0h.
31
VC Enable
RW
0b: it disables this Virtual Channel
1b: it enables this Virtual Channel
Reset to 1b.
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