TM Family Datasheet Page 63 of 81 June 2009 – " />
參數(shù)資料
型號: PI7C9X20505GPBNDE
廠商: Pericom
文件頁數(shù): 60/81頁
文件大?。?/td> 0K
描述: IC PCIE PACKET SWITCH 256BGA
產(chǎn)品變化通告: Copper Wire Change 26/Sept/2011
標(biāo)準(zhǔn)包裝: 90
系列: GreenPacket™
應(yīng)用: 封裝開關(guān),5 端口/5 線道
接口: PCI Express
封裝/外殼: 256-BGA
供應(yīng)商設(shè)備封裝: 256-PBGA(17x17)
包裝: 托盤
安裝類型: 表面貼裝
PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 63 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
6
ECRC Generation
Enable
RWS
When set, it enables the generation of ECRC when needed.
Reset to 0b.
7
ECRC Check
Capable
RO
When set, it indicates the Switch has the capability to check ECRC.
Reset to 1b.
8
ECRC Check Enable
RWS
When set, the function of checking ECRC is enabled.
Reset to 0b.
31:9
Reserved
RO
Reset to 0.
7.2.83
HEADER LOG REGISTER – OFFSET From 11Ch to 128h
BIT
FUNCTION
TYPE
DESCRIPTION
31:0
1st DWORD
ROS
Hold the 1st DWORD of TLP Header. The Head byte is in big endian.
63:32
2nd DWORD
ROS
Hold the 2nd DWORD of TLP Header. The Head byte is in big endian.
95:64
3rd DWORD
ROS
Hold the 3rd DWORD of TLP Header. The Head byte is in big endian.
127:96
4th DWORD
ROS
Hold the 4th DWORD of TLP Header. The Head byte is in big endian.
7.2.84
PCI EXPRESS VIRTUAL CHANNEL CAPABILITY ID REGISTER – OFFSET
140h
BIT
FUNCTION
TYPE
DESCRIPTION
15:0
Extended
Capabilities ID
RO
Read as 0002h to indicate that these are PCI express extended capability
registers for virtual channel.
7.2.85
CAPABILITY VERSION – OFFSET 140h
BIT
FUNCTION
TYPE
DESCRIPTION
19:16
Capability Version
RO
Read as 1h. Indicates PCIe Base Specification REV. 1.0a.
Reset to 1h.
7.2.86
NEXT ITEM POINTER REGISTER – OFFSET 140h
BIT
FUNCTION
TYPE
DESCRIPTION
31:20
Next Capability
Offset
RO
Pointer points to the PCI Express Power Budgeting Capability register
(20Ch).
Reset to 20Ch.
7.2.87
PORT VC CAPABILITY REGISTER 1 – OFFSET 144h
BIT
FUNCTION
TYPE
DESCRIPTION
2:0
Extended VC Count
HwInt
It indicates the number of extended Virtual Channels in addition to the default
VC supported by the Switch. The default value may be changed by the status
of strapped pin or auto-loading from EEPROM.
Reset to 001b.
3
Reserved
RO
Reset to 0b.
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