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參數(shù)資料
| 型號(hào)： | PI7C9X20505GPBNDE |
| 廠商： | Pericom |
| 文件頁(yè)數(shù)： | 5/81頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PCIE PACKET SWITCH 256BGA |
| 產(chǎn)品變化通告： | Copper Wire Change 26/Sept/2011 |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | GreenPacket™ |
| 應(yīng)用： | 封裝開(kāi)關(guān)，5 端口/5 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 托盤(pán) |
| 安裝類(lèi)型： | 表面貼裝 |
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PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 13 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
NAME
PIN
TYPE
DESCRIPTION
HOTPLUG [4:1]
*R6, H2, H1,
H4
I
Hot Plug Capability: It determines if the downstream port is able to
support hot plug capability. HOTPLUG [x] is correspondent to Portx,
where x=1,2,3,4. When HOTPLUG [x] is high, Portx supports hot plug
operation. The strapping pin HOTPLUG[4] is shared with
PWR_IND[2]. By default, downstream Port1, Port2, Port 3, and Port4
are equipped with hot plug function. HOTPLUG[4] has internal
pull-down, and HOTPLUG[3:1] have internal pull-up.
SLOTCLK [4:0]
*P6, J3, J1,
H5, H3
I
Slot Clock Configuration: It determines if the downstream
component uses the same physical reference clock that the platform
provides on the connector. When SLOTCLK is high, the platform
reference clock is employed. The strapping pin SLOTCLK[4] is shared
with PWR_IND[3]. By default, downstream Port1, Port2, Port 3, and
Port4 use the same physical reference clock provided by platform.
SLOTCLK[4] has internal pull-down, and SLOTCLK[3:0] have
internal pull-up.
3.3
HOT PLUG SIGNALS
NAME
PIN
TYPE
DESCRIPTION
PWR_IND [4:1]
T7, *P6, *R6,
*T6
O
Power Indicator: Indicates the power status for each slot at
downstream port. PWR_IND [x] is correspondent to Port x, where
x=1,2,3,4. They are active-high signals. The pins have internal
pull-down.
ATT_IND [4:1]
L7, N7, P7,
R7
O
Attention Indicator: Indicates the attention status for each slot at
downstream port. ATT_IND [x] is correspondent to Port x, where
x=1,2,3,4. They are active-high signals. Pins are set to “0000” by
default. ATT_IND [4] should be tied to ground through a 47K
pull-down resistor to disable the internal test function. ATT_IND[4:2]
have internal pull-down.
ATT_BTN [4:1]
L8, M8, P8,
R8
I
Attention Button: When asserted high, it represents the attention
button has been pressed for the slot at the downstream port. ATT_BTN
[x] is correspondent to Port x, where x=1,2,3,4.
MRL_PDC [4:1]
L9, N9, P9,
R9
I
Presence Detected Change: When asserted low, it represents the
device is present in the slot of downstream ports. Otherwise, it
represents the absence of the device. MRL_PDC [x] is correspondent
to Port x, where x=1,2,3,4.
PWR_ENA_L [4:1]
M10, N10,
R10, T10
O
SLOT Power Enable (Active LOW): Indicates the enable status of
the power connecting to the associated slot. PWR_ENA [x] is
correspondent to Portx, where x=1,2,3,4. They are active-low signals.
Pins are set to “0000” by default.
PWR_FLT [4:1]
M11, N11,
P11, R11
I
SLOT Power Fault: When asserted high, it indicates a power fault on
one or more supply rails. PWR_FLT [x] is correspondent to Port x,
where x=1,2,3,4.
3.4
MISCELLANEOUS SIGNALS
NAME
PIN
TYPE
DESCRIPTION
EECLK
R14
O
EEPROM Clock: Clock signal to the EEPROM interface.
EEPD
P14
I/O
EEPROM Data: Bi-directional serial data interface to and from the
EEPROM. The pin has internal pull-up.
SMBCLK
T4
I
SMBus Clock: System management Bus Clock. Pin has an internal
pull-down.
SMBDATA
T5
I/O
SMBus Data: Bi-Directional System Management Bus Data.
SCAN_EN
N14
I/O
Full-Scan Enable Control: For normal operation, SCAN_EN is an
output with a value of “0”. SCAN_EN becomes an input during
manufacturing testing.
PORTERR [4:0]
N13, P13,
M12, N12,
P12
O
Port PHY Error Status: These pins are used to display the PHY Error
status of the ports. When PORTERR is flashing (alternating high and
low signals), it indicates that a PHY error is detected. When it is low,
no PHY error is detected. PORTERR [x] is correspondent to Port x,
where x=0,1,2,3,4.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C9X20508GPANDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube |
| PI7C9X20508GPBEVB | 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits) |
| PI7C9X20508GPBNDE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C9X20508GPNDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Trays |
| PI7C9X2G303ELAEVB | 制造商:Pericom Semiconductor Corporation 功能描述:Switch IC Development Tools Eval Kit for PI7C9X2G303ELA |
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