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參數(shù)資料
| 型號(hào)： | PI7C9X20505GPBNDE |
| 廠商： | Pericom |
| 文件頁(yè)數(shù)： | 31/81頁(yè) |
| 文件大小： | 0K |
| 描述： | IC PCIE PACKET SWITCH 256BGA |
| 產(chǎn)品變化通告： | Copper Wire Change 26/Sept/2011 |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | GreenPacket™ |
| 應(yīng)用： | 封裝開(kāi)關(guān)，5 端口/5 線道 |
| 接口： | PCI Express |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-PBGA（17x17） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 37 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
7.2.7
CACHE LINE REGISTER – OFFSET 0Ch
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
Cache Line Size
RW
The cache line size register is set by the system firmware and the operating
system cache line size. This field is implemented by PCI Express devices as a
RW field for legacy compatibility, but it has no impact on any PCI Express
device functionality.
Reset to 0b.
7.2.8
PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch
BIT
FUNCTION
TYPE
DESCRIPTION
15:8
Primary Latency
timer
RO
Does not apply to PCI Express. Must be hardwired to 00h.
7.2.9
HEADER TYPE REGISTER – OFFSET 0Ch
BIT
FUNCTION
TYPE
DESCRIPTION
23:16
Header Type
RO
Read as 01h to indicate that the register layout conforms to the standard
PCI-to-PCI Bridge layout.
7.2.10
PRIMARY BUS NUMBER REGISTER – OFFSET 18h
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
Primary Bus Number
RW
Indicates the number of the PCI bus to which the primary interface is
connected. The value is set in software during configuration.
Reset to 00h.
7.2.11
SECONDARY BUS NUMBER REGISTER – OFFSET 18h
BIT
FUNCTION
TYPE
DESCRIPTION
15:8
Secondary Bus
Number
RW
Indicates the number of the PCI bus to which the secondary interface is
connected. The value is set in software during configuration.
Reset to 00h.
7.2.12
SUBORDINATE BUS NUMBER REGISTER – OFFSET 18h
BIT
FUNCTION
TYPE
DESCRIPTION
23:16
Subordinate Bus
Number
RW
Indicates the number of the PCI bus with the highest number that is
subordinate to the Bridge. The value is set in software during configuration.
Reset to 00h.
7.2.13
SECONDARY LATENCY TIMER REGISTER – OFFSET 18h
BIT
FUNCTION
TYPE
DESCRIPTION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C9X20508GPANDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube |
| PI7C9X20508GPBEVB | 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits) |
| PI7C9X20508GPBNDE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C9X20508GPNDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Trays |
| PI7C9X2G303ELAEVB | 制造商:Pericom Semiconductor Corporation 功能描述:Switch IC Development Tools Eval Kit for PI7C9X2G303ELA |
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