TM Family Datasheet Page 28 of 81 June 2009 – " />
參數(shù)資料
型號(hào)： PI7C9X20505GPBNDE
廠商： Pericom
文件頁(yè)數(shù)： 21/81頁(yè)
文件大?。?/td> 0K
描述： IC PCIE PACKET SWITCH 256BGA
產(chǎn)品變化通告： Copper Wire Change 26/Sept/2011
標(biāo)準(zhǔn)包裝： 90
系列： GreenPacket™
應(yīng)用： 封裝開(kāi)關(guān)，5 端口/5 線道
接口： PCI Express
封裝/外殼： 256-BGA
供應(yīng)商設(shè)備封裝： 256-PBGA（17x17）
包裝： 托盤(pán)
安裝類型： 表面貼裝
PI7C9X20505GP
5Port-5Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 28 of 81
June 2009 – Revision 1.5
Pericom Semiconductor
ADDRESS
PCI CFG
OFFSET
DESCRIPTION
80h: Bit [29:28]
Bit [7:6]: PME Support for D2 and D1 states
19h
84h (Port 4)
84h: Bit [31:24]
Power Management Data for Port 4
Bit [15:8] – read only as Data register
F0h (Port 0)
F0h: Bit [28]
80h (Port 0)
80h: Bit[21]
144h (Port 0)
144h: Bit [4]
ECh (Port 0)
ECh: Bit [26:24]
Slot Clock Configuration for Port 0
Bit [1]: When set, the component uses the clock provided on the
connector
Device specific Initialization for Port 0
Bit [2]: When set, the DSI is required
LPVC Count for Port 0
Bit [3]: When set, the VC1 is allocated to LPVC of Egress Port 0
Port Number for Port 0
Bit [6:4]: It represents the logic port numbering for physical port
0
20h
154h (Port 0)
154h: Bit [7:1]
VC0 TC/VC Map for Port
0
Bit [15:9]: When set, it indicates the corresponding TC is
mapped into VC0
E0h (Port1)
E0h: Bit [24]
F0h (Port 1)
F0h: Bit [28]
80h (Port 1)
80h: Bit[21]
144h (Port 1)
144h: Bit [4]
ECh (Port 1)
ECh: Bit [26:24]
PCIe Capability Slot Implemented for Port 1
Bit [0]: When set, the slot is implemented for Port 1
Slot Clock Configuration for Port 1
Bit [1]: When set, the component uses the clock provided on the
Connector
Device specific Initialization for Port 1
Bit [2]: When set, the DSI is required
LPVC Count for Port 1
Bit [3]: When set, the VC1 is allocated to LPVC of Egress Port 1
Port Number for Port 1
Bit [6:4]: It represents the logic port numbering for physical port
1
22h
154h (Port 1)
154h: Bit [7:1]
VC0 TC/VC Map for Port 1
Bit [15:9]: When set, it indicates the corresponding TC is
mapped into VC0
E0h (Port 2)
E0h: Bit [24]
F0h (Port 2)
F0h: Bit [28]
80h (Port 2)
80h: Bit[21]
144h (Port 2)
144h: Bit [4]
ECh (Port 2)
ECh: Bit [26:24]
PCIe Capability Slot Implemented for Port 2
Bit [0]: When set, the slot is implemented for Port 2
Slot Clock Configuration for Port 2
Bit [1]: When set, the component uses the clock provided on the
Connector
Device specific Initialization for Port 2
Bit [2]: When set, the DSI is required
LPVC Count for Port 2
Bit [3]: When set, the VC1 is allocated to LPVC of Egress Port 2
Port Number for Port 2
Bit [6:4]: It represents the logic port numbering for physical port
2
24h
154h (Port 2)
154h: Bit [7:1]
VC0 TC/VC Map for Port 2
Bit [15:9]: When set, it indicates the corresponding TC is
mapped into VC0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C9X20508GPANDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube
PI7C9X20508GPBEVB 制造商:Pericom Semiconductor Corporation 功能描述:EVAL BOARD - Boxed Product (Development Kits)
PI7C9X20508GPBNDE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 5port 8lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
PI7C9X20508GPNDE 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Trays
PI7C9X2G303ELAEVB 制造商:Pericom Semiconductor Corporation 功能描述:Switch IC Development Tools Eval Kit for PI7C9X2G303ELA
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