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參數(shù)資料
| 型號： | ML60852A |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 14/82頁 |
| 文件大小： | 370K |
| 代理商： | ML60852A |
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FEDL60852A-03
1Semiconductor
ML60852A
20/81
(3) EP0 Transmit packet ready interrupt
This is used mainly during the transmission of a data packet in a control read transfer.
Operation
Source of operation
Description (conditions, responses, etc.)
EP0 Transmit packet ready
interrupt generation
ML60852A
During a control read transfer when the processing has
changed from Setup stage to Data stage, it is necessary for
the local MCU (firmware) to write the data to be transmitted
to the transmit FIFO of EP0. The local MCU must enable
EP0 transmit packet ready interrupt bit (bit D7 of
INTENBL1) to facilitate write operation to EP0TXFIFO. At
this time, an EP0 transmit packet ready interrupt is
generated. The cause of the interrupt is EP0 transmit
packet ready bit (D1 of EP0STAT) being low.
This interrupt will invoke the local MCU (firmware) to
process EP0 transmit operation which will result in sending
packets to the host.
For the second and subsequent packets, in addition to EP0
transmit packet ready interrupt being enabled, before the
interrupt is generated, it is necessary for an ACK response
to come from the host for the packet that has just been
sent.
End of EP0 transmit
packet ready interrupt
Local MCU (firmware)
In the case of EP0 transmission, after one packet of EP0
transmit data has been written in EP0TXFIFO, write a “1”
into the EP0 transmit packet ready bit (bit D1 of EP0STAT).
This puts the ML60852A in a state in which it can transmit
the data (that is, it can transmit the data packet when an IN
token arrives), and the
INTR pin is de-asserted at the same
time.
Even when the number of bytes in the write data is less
than the maximum packet size, it is possible to transmit the
data by writing a “1” into the transmit packet ready status
bit. This makes it possible to transmit a short packet.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ML60852ATBZ010 | 功能描述:USB 接口集成電路 12 Mbps; USB Device Controller RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ML60852ATBZ03A | 制造商:ROHM Semiconductor 功能描述: |
| ML-60-V2/80721 | 制造商:Thomas & Betts 功能描述: |
| ML61 | 制造商:MINILOGIC 制造商全稱:MINILOGIC 功能描述:Series Positive Voltage Detector |
| ML61_09 | 制造商:MINILOGIC 制造商全稱:MINILOGIC 功能描述:Positive Voltage Detector CMOS Low Power Consumption : Typical 1.0uA at Vin=2.0V |
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