參數(shù)資料
型號(hào)： ML60852A
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP44
封裝： PLASTIC, QFP-44
文件頁(yè)數(shù)： 10/82頁(yè)
文件大?。?/td> 370K
代理商： ML60852A
FEDL60852A-03
1Semiconductor
ML60852A
17/81
(7) Packets and Packet Sizes
The ML60852A packs the transmit data into packets and unpacks (restores to the original form) the received data.
The packed data that is recognized by the software client is a set of data consisting of one or more packets, and this
is called an I/O request Packet (IRP).
Among the several packets in an IRP, all the packets other than the last packet are transferred with the maximum
packet size. Only the last packet can be transferred as a "short packet", that is, a packet whose size is less than the
maximum packet size.
Packet
1
I/O Request Packet (IRP)
Maximum packet size
Packet
2
Packet
n-1
Packet
n
1 Packet
M Bytes
The ML60852A has payload registers corresponding to each end point, and it is possible to set the maximum packet
size for each end point in these registers.
The maximum packet size should be within the capacity of the
corresponding FIFO, and can be set as follows:
(1) EP0 Receive packet size can be 32 bytes or less;
(2) EP0 Transmit packet size can be 32 bytes or less;
(3) EP1 Transmit/receive packet size can be 64 bytes or less;
(4) EP2 Transmit/receive packet size can be 64 bytes or less;
(5) EP3 Transmit/receive packet size can be 32 bytes or less;
(6) EP4 Bulk/interrupt transmit/receive packet size can be 64 bytes;
In the 5EP mode, the EP4 isochronous packet size can be 512 bytes or less;
In the 6EP mode, the EP4 isochronous packet size can be 256 bytes or less;
(7) In the 6EP mode, the EP5 bulk/interrupt packet size can be 64 bytes or less;
In the 6EP mode, the EP5 isochronous packet size can be 256 bytes or less.
On the USB bus, the separation between successive packets is distinguished by appending a special signal condition
called EOP (End of Packet) at the end of each packet. The appending of EOP during transmission and the detection
and removal of EOP during reception are carried out by the ML60852A automatically.
(1) At the time of transmission, the packet is deemed to have ended when the local MCU has completed writing the
required number of bytes of data in the transmit FIFO and has then asserted the transmit ready status bit. (The
actual addition of EOP is executed at the time of transmitting the data over the USB bus after waiting for the IN
token from the host.) The packet will be a short packet if the transmit packet ready status bit is asserted after
writing data with less number of bytes than the maximum packet size. In particular, by asserting the transmit
packet ready status bit without writing any data, it is possible to form a null packet whose data length is zero.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ML60852ATBZ010 功能描述:USB 接口集成電路 12 Mbps; USB Device Controller RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ML60852ATBZ03A 制造商:ROHM Semiconductor 功能描述:
ML-60-V2/80721 制造商:Thomas & Betts 功能描述:
ML61 制造商:MINILOGIC 制造商全稱:MINILOGIC 功能描述:Series Positive Voltage Detector
ML61_09 制造商:MINILOGIC 制造商全稱:MINILOGIC 功能描述:Positive Voltage Detector CMOS Low Power Consumption : Typical 1.0uA at Vin=2.0V
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