參數(shù)資料
型號: M37902FJCHP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機
文件頁數(shù): 98/143頁
文件大?。?/td> 1463K
代理商: M37902FJCHP
M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
98
POWER SAVING FUNCTION
The following functions can save the power dissipation of the whole
system.
(1) External bus fixation in standby state
By setting the standby state select bit (bit 2 of the particular function
select register 1) to
1
, in the stop or wait mode, the I/O pins of the
external buses and bus control signals can be switched to program-
mable I/O port pins. By setting these pins
state with the correspond-
ing port registers and port direction registers, unnecessary current
will not flow between the microcomputer and external devices. As a
result, in the stop or wait mode, the power dissipation of the whole
system can be lowered. Table 18 lists the correspondence between
the external buses, bus control signals, and programmable I/O port
pins.
This function is valid only in the stop or wait mode. At termination of
the stop or wait mode, the original function of external buses and bus
control signals become valid.
Table 18. Correspondence between external buses, bus control sig-
nals, and programmable I/O port pins
External buses,
Bus control signals
A
0
to A
7
,
A
8
to A
15
,
A
16
to A
23
D
0
to D
7
,
D
8
to D
15
(Note)
RD, BLW,
BHW
(Note)
CS
0
0
Standby state select bit
A
0
to A
7
,
A
8
to A
15
,
A
16
to A
23
D
0
to D
7
,
D
8
to D
15
RD, BLW,
BHW
CS
0
1
P10
0
to P10
7
,
P11
0
to P11
7
,
P0
0
to P0
7
P1
0
to P1
7
,
P2
0
to P2
7
P3
1
, P3
2
,
P3
3
P9
0
Note:
When the external data bus width = 8 bits (BYTE = V
CC
level),
this becomes a programmable I/O port pin, regardless of the
standby state select bit
s contents.
(2) Stop of system clock in wait mode
In the wait mode, if the internal peripheral devices need not to oper-
ate, the system clock stop select bit at WIT (bit 3 of the particular
function select register 1) =
1
, both of system clock f
sys
and periph-
eral devices
clock stop their operations, and the power dissipation
can be saved.
For details, refer to the section on the standby function.
(3) Stop of oscillation circuit
When an externally-generated-stable clock is input to pin X
IN
, the
power dissipation can be saved if both of the following conditions are
met:
the external clock input select bit (bit 1 of the particular function
select register 0) =
1
.
the oscillation driver between pins X
IN
and X
OUT
stops its operation.
At this time, the output level at pin X
OUT
is fixed to
H
. When not us-
ing a PLL output clock, also, the supply of
φ
BIU
and
φ
CPU
restarts
their operations just after the microcomputers returns from the stop
mode, owing to an interrupt request occurrence. Therefore, an in-
struction can be executed just after the termination of the stop mode.
For details, refer to the section on the clock generating circuit and
standby function.
(4) Disconnection from pin V
REF
When not using the A-D converter and D-A converter, by setting the
V
REF
connection select bit (bit 6 of the A-D control register 1) to
1
,
the resistor ladder network of the A-D converter will be disconnected
from the reference voltage input pin (V
REF
). In this case, no current
flows from pin V
REF
to the resistor ladder network, and the power dis-
sipation can be saved. Note that, after the V
REF
connection select bit
changes from
1
(V
REF
disconnected) to
0
(V
REF
connected), be
sure that a waiting time of 1 μs of more has passed before the A-D
conversion starts. For details, refer to the sections on the A-D con-
verter and D-A converter.
(5) Address output selection
In the memory expansion mode or microprocessor mode, when the
address output select bit (bit 4 of the particular function select regis-
ter 1) becomes
1
, the unnecessary change of address pins
state
will be avoided, without output of an address at access to the inter-
nal area.
For details, refer to the section on the BIU.
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