參數(shù)資料
型號(hào)： M37902FJCHP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機(jī)
文件頁(yè)數(shù)： 141/143頁(yè)
文件大?。?/td> 1463K
代理商： M37902FJCHP
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Corrections and
Page
Page 92,
Table 15,
Note
Supplement
ar
Erro
y
Explanation
r
for M37902FxC Dat
asheet (REV.
Correction
B) NO.9
(9/11)
No
t
e:
Be sur
MHz. f
fr
om pin X
I
e
(X
I
that syst
N
) m
N
(f
em clock f
sys
ean
s
the fr
X
IN
)
.
doe
ncy
s
of the input clock
not exceed 26
eque
No
t
e:
The PLL multipli
frequency of
the range f
frequency of
reset,
the PLL multipli
al
lowed to be changed only once.
cat
i
on r
output clock (
10 MHz to
the input clock fr
cation r
atio must
be set so
f
PLL
)
MHz. f
(X
I
om pin X
I
atio sel
that the
must be
N
) m
eans the
N
(f
X
IN
)
ect
bits are
the PLL
rom
i
n
26
. After
Page 98,
Right column,
Line 8
Page 98,
Right column,
Line 10
the ladder net
w
or
k of t
he
A
-
D
converter
wi
ll
the resistor ladder network of the A-D converter will
pin V
REF
to the ladder network, and the power dissipation
pin V
REF
to the resistor ladder network, and the power
dissipation
#
#
Page 96,
Left column,
Line 7
rest
the oscil
arted
lation circuit
a
nd
P
LL circuit
ha
ve
be
en
the oscil
lation circuit
h
as
be
en
restar
ted
#
M37902F8C
internal flash m
G
P
,
emory
M37902F
8CHP
: block configuration of
(Deleted)
#
Fi
guration of
g.
106. M
3
i
nt
7902FJCGP
ernal flash mem
,
M37902FJC
ory
HP :
b
lock confi-
Fig. 106. M37902FJCHP : block configuration of inter-
nal flash memory
Page 101,
Fig. 106
#
Fi
figuration of
g.
108. M
3
7902FCC
i
nt
ernal flash mem
G
P
,
M37902F
ory
CCHP
:
block con-
Fig. 107. M37902FCCHP : block configuration of inter-
nal flash memory
Page 102,
Fig. 107
#
M37902FE
of inter
CGP, M
fla
sh
37902
memor
FEC
HP :
b
lock conf
i
gurat
i
on
nal
y
(Deleted)
Fig. 110. M37902FGCGP, M37902FGCHP : block con-
figuration of internal flash memory
CGP,
M37902F
HCH
of inter
nal
fla
sh
memor
y
Fig. 108. M37902FGCHP : block configuration of inter-
nal flash memory
Page 102,
Fig. 108
#
M37902FH
P :
bl
ock
config
ur
ation
(Deleted)
#
Page 103,
Right column,
Lines 15 to 17
area if
Note that,
the user
when the boot ROM
use
s
the flash m
emory
area
se
read
r
ial
I/O
mode.
i
s
area if the user uses the flash memory serial I/O mode.
Addresses FFB0
16
to FFBF
16
are the reserved area for
the serial programmer. Therefore, when the user uses
the flash memory serial I/O mode, do not program to this
area.
Note that, when the boot ROM area is read
#
Page 106,
Right column,
After line 13
Page 106,
Fig. 114,
Notes 4
Page 107,
Left column,
Lines 16 to 20
progr
am the
u
ser
ROM
area.
program the user ROM area.
After reset removal, be sure not to change the status at
pins MD0 and MD1.
#
#
Pi
serial I/
n
co
nnection of
O mode
M37902F
xCGP in f
l
ash m
emory
(Deleted)
#
4:
V
alid onl
y
clear
to “0”
.
4:
Valid only clear to “0”. This bit 3 must be controll-
ed with bit 1 = “1”.
#
to an
address will
The write stat
command consists
e
ven
ad
dr
b
e
e
o
efore,
f
8-bit
u
nits
any data writt
must be
w
n
r
to an odd
i
t
ten only
ess; ther
i
nvalid.
e
even address;
address will
cycle of a
data m
ust be writt
The write stat
occu
be sure
no
command consisting of
therefor
b
e
i
nvalid. Sin
p
r
ogramm
8
bi
t
s must
mand written
the write data
command consists
en to even and odd addr
be written t
o an
e, any com
ce
ing
to an odd
at the 2nd
of 16 bits,
e
sses.
this
e
Page 107,
Right column,
After line 24
#
request
occu
r
rence.
request
r
rence.
to use
In the CPU
the
ST
reprogr
amming m
uction
od
e,
t
P
and
WIT
instr
s.
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