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| 型號(hào)： | M37902FJCHP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 106/143頁(yè) |
| 文件大?。?/td> | 1463K |
| 代理商： | M37902FJCHP |
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M37902FCCHP, M37902FGCHP, M37902FJCHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
106
CPU Reprogramming Mode
The CPU reprogramming mode is used to perform the operations for
the internal flash memory (reading, programming, erasing) under
control of the CPU.
In this mode, only the user ROM area can be reprogrammed; the
boot ROM area cannot be reprogrammed.
The user-original reprogramming control software for the CPU repro-
gramming mode can be stored in either the user ROM area or the
boot ROM area. Because the CPU cannot read out the flash memory
in the CPU reprogramming mode, the above software must be trans-
ferred to the internal RAM in advance to be executed.
Boot Mode
The user-original reprogramming control software for the CPU re-
programming mode must be stored into the user ROM area or the
boot ROM area in the flash memory parallel I/O mode in advance. (If
this program has been stored into the boot ROM area, the flash
memory serial I/O mode will become unavailable).
Note that addresses of the boot ROM area depend on the accessing
ways to the boot ROM area, When accessing in the flash memory
parallel I/O mode, these addresses will be shifted to 0000
16
to
3FFF
16
(byte address). On the other hand, when accessing with the
CPU, these addresses will be shifted to C000
16
to FFFF
16
(byte
address).
Reset removal with both of the MD0 and MD1 pins held “L” invokes
the normal microcomputer mode, and the CPU operates using the
control software stored in the user ROM area. In this case, the boot
ROM area is not accessible.
Removing reset with the MD0 pin held “L” and the MD1 pin “H”, the
CPU starts its operation using the reprogramming control software
stored in the boot ROM area. This mode is called the boot mode. The
reprogramming control software in the boot ROM area can also re-
program the user ROM area.
After reset removal, be sure not to change the status at pins MD0
and MD1.
Fig. 114 Bit configuration of flash memory control register
Flash memory control register
RY/BY status bit
0: Busy (Programming or erasing is active.)
1: Ready
CPU reprogramming mode select bit
(Note 2)
0: Normal mode (Software commands are ignored.)
1: CPU reprogramming mode (Software commands are acceptable.)
Lock bit invalidity select bit
(Note 3)
0: Block lock by lock bit data is valid.
1: Block lock by lock bit data is invalid.
Flash memory reset bit
(Note 4)
0: Normal operation
1: Reset
Must be
“
0
”
.
User ROM area select bit
(Note 5)
(Valid only in the boot mode.)
0: Boot ROM area access
1: User ROM area access
Address
9E
16
7
6
5
4
3
2
1
0
0
Notes 1:
The contents of the flash memory control register after reset is removed are
“
XX000001
2
”
.
2:
To set
“
1
”
, writing of
“
0
”
to bit 1 and subsequent writing of
“
1
”
to bit 1 are necessary. Writing to bit 1
must be performed by the user-original reprogramming control software in the internal RAM.
3:
To set
“
1
”
, writing of
“
0
”
to bit 2 and subsequent writing of
“
1
”
to bit 2 are necessary while bit 1 =
“
1
”
.
4:
Valid only when bit 1 =
“
1
”
. Set bit 3 to
“
1
”
(reset), and then clear to
“
0
”
. This bit 3 must be controlled
with bit 1 =
“
1
”
.
5:
Writing to bit 5 must be performed by the user-original reprogramming control software in the internal
RAM.
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